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Embedded systems need ever increasing computational performances. Since they have limited energy resources, power consumption has to be minimized. Dynamic Voltage and Frequency Scaling (DVFS) techniques combined with Body Biasing techniques decrease the power consumption of a chip by providing just enough computational performance to the chip so as to finish the task at its deadline. A Power Mode...
During the last decade, Dynamic Voltage-Frequency Scaling (DVFS) techniques have been widely proposed to improve integrated circuit efficiency. When these mechanisms are composed of independent actuators for supply voltage and clock frequency, a predefined sequence has to be used to switch from one state to another one in order to avoid undesirable conditions. On the contrary, when they are based...
In order to optimize global energy efficiency in the context of dynamic Process-Voltage-Temperature variations in advanced nodes, a fine-grain Adaptive Voltage and Frequency Scaling architecture is proposed and implemented on a 32 nm GALS Multi-Processor SoC. Each Processing Element is an independent Voltage-Frequency island and shows up to 18.2% energy gains due to local adaptability. Compared to...
Mobile computing platforms must provide ever increasing performances under stringent power consumption constraints. Dynamic Voltage and Frequency Scaling (DVFS) techniques allow to reduce the power consumption by providing just enough power to the chip in order to finish the task before its deadline. DVFS is usually achieved by setting the supply voltage and the clock frequency to predefined values...
Fine-grain Dynamic Voltage and Frequency Scaling (DVFS) is becoming a requirement for Globally-Asynchronous Locally-Synchronous (GALS) architectures. However, the area overhead of adding voltage and frequency control engines in each voltage/ frequency island must be taken into account to optimize the circuit. This paper focuses on the control for the frequency actuator. An optimal and robust saturated...
Fine-grain Dynamic Voltage and Frequency Scaling (DVFS) is becoming a requirement for Globally-Asynchronous Locally-Synchronous (GALS) architectures. However, the area overhead of adding voltage and frequency control engines in each voltage and frequency island must be taken into account to optimize the circuit. A small-area fast-reprogrammable Frequency-Locked Loop (FLL) engine is a suited option,...
While traditional cluster computers are more constrained by power and cooling costs for solving extreme-scale (or exascale) problems, the continuing progress and integration levels in silicon technologies make possible complete end-user systems on a single chip. This massive level of integration makes modern multicore chips all pervasive in domains ranging from climate forecasting and astronomical...
In this paper we propose an adaptive technique to reduce power consumption of Multiprocessor Systems-on-Chip. The method, based on Game Theory, optimizes the frequencies of local processors while fulfilling applicative real-time constraints. Contrary to other approaches, our solution is compatible with reconfigurable Systems-on-Chip. The obtained power consumption gains on a telecommunication test-case...
In this paper we present an adaptive technique to locally adjust the frequency of processing elements on MP-SoC. The proposed method, based on game theory, optimizes the system while fulfilling dynamic constraints. A telecom test-case has been used to demonstrate the effectiveness of our technique. For the evaluated scenario, the proposed technique has obtained up to 20% of latency gain and 38% of...
Multiprocessor system-on-chip composed of several processing elements will be integrated in embedded systems handling multiple applications with diverse constraints. In order to improve the system performance and temperature profile, dynamic voltage frequency scaling can be applied at processor level. In this article we study an existing approach based on Game Theory, which adjusts at run-time the...
We consider multiprocessor system-on-chip (MP-SoC) integrating several processing elements (PE). These architectures require distributed and scalable control techniques for run-time optimization of applicative parameters. Our approach is to use the game theory as an optimization model to solve the trade-off issues at run-time. We applied it to the distributed dynamic voltage frequency scaling (DVFS)...
With forecasted hundreds of processing elements (PE), future embedded systems will be able to handle multiple applications with very diverse running constraints. In order to avoid hot-spots and control the temperature of the tiles, dynamic voltage-frequency scaling (DVFS) can be applied at PE level. At system level, it implies to dynamically manage the different voltage-frequency couples of each PE...
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