The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper focuses on the production testing of MOS Current Mode Logic (MCML) gates based on 45nm MOS technology. The effect of the resistance value of open faults in an NAND/AND gate is investigated. It is shown that the test speed is determined by the characteristics of the pull up load. Open faults in other transistors are not affected by test speed. Also, it is proven that only three ordered test...
Nowadays, FPGAs play a great role in electronic circuits design especially in implementing critical applications. As a result, the need for adding fault-tolerance to FPGAs becomes very important. In this paper, a fault-tolerant technique and associated modifications on FPGA architecture are proposed. This technique can detect and recover from open faults in programmable interconnects. It was successfully...
In this paper, a CMOS neural amplifier based on memcapacitor has been realized. A memcapacitor is a new element based on memristor. A performance comparison between memcapacitor based realization and conventional integrated one has been introduced. The circuits were simulated using 90nm CMOS technology, Vdd = 1.2v, for a total input referred noise of 1.97 µVrms and a total power consumption of 1.28...
Switched capacitor Delta Sigma analog to digital converters are basic parts in mixed signal system; its testing is of great importance. The paper discusses a low-cost test for the conventional, as well as low power, first order switched capacitor Delta Sigma ADC. The test detects only the catastrophic faults assuming one fault at a time. The simulation results prove that the minimum test set required...
Software-defined radio (SDR) is a rapidly evolving technology. SDR have been widely studied as a solution to support multiple competing and in compatible air interface standard in future wireless communications. In this paper, we present the design of a digital down converter (DDC) module for triple-mode WCDMA, CDMA2000 and GSM. The designed module consists of digital mixer, CIC filter, and decimation...
A proposed configurable analog block (CAB) is presented, simulated and analyzed. The CAB consists of a CMOS current feedback operational amplifier (CFOA), presented by the authors, as the main active block, programmable resistor array, programmable capacitor array and MOSFET switches. Using the CABs, the universal field programmable analog array (FPAA) has been constructed, which can realize many...
This paper presents a CMOS fully differential current feedback operational amplifier with controllable 3-dB bandwidth. The FDCFOA has the advantage of a wide range controllable 3-dB bandwidth (~57 MHz to 500 MHz) without changing the feedback resistance. The FDCFOA has a standby current of 320 mu A. PSpice simulations of the FDCFOA block were given using 0.25 mum CMOS technology from AMI MOSIS and...
In this paper, the modified mid-band exchange coefficient (MMBEC) image watermark technique has been realized on FPGA platform. This technique is implemented on Xilinx XCV800-pq240 chip and Labview software as graphical user interface. The MMBEC technique utilizes 49% of the chip area and operating maximum frequency of 36 MHz. A performance comparison between the software and hardware implementations...
This paper presents a CMOS fully differential current feedback operational amplifier with controllable 3-dB bandwidth. The FDCFOA has the advantage of a wide range controllable 3-dB bandwidth (~57 MHz to 500 MHz) without changing the feedback resistance. The FDCFOA has a standby current of 320 ??A. PSpice simulations of the FDCFOA block were given using 0.25 ??m CMOS technology from AMI MOSIS and...
A novel CMOS low-voltage current feedback operational amplifier (CFOA) is presented. The proposed CFOA based on a new positive second-generation current conveyor (CCII+). The new circuit allows almost a rail-to-rail input and output operation; also, it reduces the offset voltage and provides high driving current capabilities. The CFOA is operating at supply voltages of plusmn0.75 V with a total standby...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.