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This paper presents a LED driver for visible light communication (VLC) application, and the main purpose is to solve the low data rate problem used to be in switching type LED driver. The GaN power device is used to replace the traditional silicon power device of switching LED driver in this paper for the purpose of increasing switching frequency of converter, and then the bandwidth of data transmission...
The Light-Emitting Diode (LED) driver is an important part of Visible Light Communication (VLC) systems. The main challenge of the VLC LED driver is to offer a high data transmission rate with high power efficiency. This paper presents the design of a white light LED driver that combines the LED lighting with VLC technology. The proposed LED driver uses linear current regulation and controls the AC...
A fully integrated solar charger controller is presented in this paper. The charger has wide input voltage range about 10V to 28V for the solar-powered panel. The input loop regulation is used here as the MPPT protection. This charger also provides different kinds of battery voltages about 4V to 12V. The controller system uses just one error amplifier and no external compensation components is needed...
This paper discusses the design of a 90 nm CMOS IV 10-bit lGS/s current-steering D/A converter. The proposed design operates under low supply voltage of IV and gives a large differential full- scale output of 0.5 Vppd. A wide full-scale current range of 2-10 mA is designed and the output impedance of the DAC is optimized for different full-scale currents by a bias circuit related to them. The post-layout...
A 3.8-Gb/s laser driver with automatic power control (APC) using thermistors is presented. The chip was fabricated in 0.25?m 1P5M CMOS process. With a waveform shaping circuit, the driver could generate a 5mA to 60mA modulation current with its duty cycle maintained at 50%. A modified MUX circuit is also introduced to improve the jitter performance of both the direct and latched data output. And with...
A 2.5Gb/s burst-mode limiting amplifier for gigabit passive optical networks (GPON) is presented in this paper. A multistage architecture with a feedforward automatic threshold control (ATC) circuit is used for quick response. A response time of 5ns and sensitivity of 4 mVpp1 is achieved by introducing a modified ATC circuit and a modified amplified stage with active feedback and negative Miller capacitance...
This paper presents the design of a 90 nm CMOS 1V 10-bit 400MS/s digital-to-analog converter. Current-steering architecture segmented into 6 MSB unary and 4 LSB binary-weighted cells is employed for high-speed operations. The low voltage design with a large differential full-scale output voltage 0.5 Vpp is presented. The post-layout simulation results show that the SFDR and ENOB are 64.4 dB and 9...
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