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A highly integrated platform for micro- and mm-wave frequency applications is introduced. The platform utilizes heterogeneous process modules with integrated passive and tunable devices together with silicon and GaAs MMIC technology to achieve outstanding flexibility. The different process modules are accounted for and their feasibility is proven through a number of application demonstrators from...
The SIAM Medea+ project is developing circuits for 100Gbit/s optical communications for use in the next generation Ethernet backbone network. One promising bandwidth-efficient technology is sub-carrier multiplexing (SCM) where quadrature modulated (QAM) signals on different carrier frequencies are combined and subsequently encoded onto an optical carrier. This transceiver approach capitalizes on the...
To demonstrate the capability of the System-on-Package concept for microwave design a 19 GHz low-power, low-noise amplifier in 0.13 mum CMOS is manufactured. A CMOS chip is flip-chip mounted on a glass carrier with integrated passive components. The LNA has a power gain of 7 dB, a 3.8 dB noise figure, and a IP1dB of -5.8 dBm at 19.2 GHz. The LNA consumes 5 mA from a 1.2 V supply.
Two 130nm CMOS VCOs with ferroelectric varactors are presented. The cross-coupled VCO-cores are flip-chip mounted on silicon carriers with integrated inductors and tunable ferroelectric varactors. The output frequency of the first VCO is tunable from 23.4 GHz to 26.1 GHz, corresponding to a tuning range of 11 %. The phase noise of this VCO, tuned to its center frequency, measures -117 dBC/Hz at 1...
This work presents a fully integrated differential 5.8 GHz low-noise amplifier (LNA). The LNA is fabricated in a 90 nm RF-CMOS process and has a power gain of 12.5 dB, an IIP3 of 4dBm, and a noise figure of 1.7 dB consuming 14 mA from a 1.2 V supply. Compared to previously reported differential CMOS designs this LNA show lower noise figure and better linearity.
Two low phase noise, sub-1 V supply VCO topologies have been explored at 12 and 18 GHz in a 90 nm CMOS technology for direct LO generation in microwave link applications. At 12 GHz, a cross-coupled differential NMOS pair VCO achieves a phase noise of -117 dBc/Hz at 1 MHz offset while consuming only 1.6 mW from a 0.47 V supply. At 18 GHz a Hartley VCO with a novel tuning scheme reached -119 dBc/Hz...
A fully integrated 0.6 V VCO for the GPS L1 band is realized in a 90 nm RF-CMOS process. The purpose of the design is to demonstrate how suitable deep submicron CMOS transistors are for ultra low voltage, low power oscillator design. The VCO operates at 6.3 GHz and a divide-by-four circuit buffer provide the wanted 1575.42 MHz signal. Measured phase noise is for a 0.6 V supply voltage and bias current...
The design and measured performance of two low-noise amplifiers at 15 GHz and 20 GHz realized in a 90 nm RF-CMOS process are presented in this work. The 15 GHz LNA achieves a power gain of 12.9 dB, a noise figure of 2.0 dB and an input referred third-order intercept point (IIP3) of -2.3 dBm. The 20 GHz LNA has a power gain of 8.6 dB, a noise figure of 3.0 dB and an IIP3 of 5.6 dBm. Compared to previously...
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