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Low-power embedded memory and an ARM Cortex-M0 core that operate at 30 MHz were fabricated in combination with a 60-nm c-axis aligned crystalline indium–gallium–zinc oxide FET and a 65-nm Si CMOS. The embedded memory adopted a structure wherein oxide semiconductor-based 1T1C cells are stacked on Si sense amplifiers. This memory achieved a standby power of 3 nW while retaining data and an active power...
A 16-level cell is demonstrated using a test chip of nonvolatile oxide semiconductor RAM comprising c-axis aligned crystalline In-Ga-Zn oxide FETs. A read circuit composed of voltage followers outputs a read voltage with a maximum distribution of 37 mV. A single voltage follower has a maximum distribution of the read voltage of 25.3 mV. A 200 ns write time of the test chip is demonstrated.
A flip-flop achieving high-speed backup utilizing a Si transistor and long-term retention with zero standby power by means of a transistor of c-axis aligned crystalline (CAAC) In-Ga-Zn oxide, a kind of CAAC oxide semiconductor, featuring extremely low off-state current is proposed. Using the flip-flop, a 32-bit processor has been fabricated with 350-nm Si/180-nm CAAC oxide semiconductor technology,...
SRAM with backup circuits using a crystalline oxide semiconductor (OS) (e.g., a c-axis aligned crystalline oxide semiconductor (CAAC-OS) typified by CAAC In-Ga-Zn oxide (CAAC-IGZO)) is reported. Results of cell-level simulation based on 45-nm Si/100-nm OS process technology show backup time of 3.9 ns, recovery time of 2.0 ns, and break-even time of 21.7 ns. The OS-SRAM cell can replace a standard-SRAM...
A chip of embedded SRAM having backup circuits using a 60-nm c-axis aligned crystalline oxide semiconductor (CAAC-OS) such as CAAC indium-gallium-zinc oxide (CAAC-IGZO) and Cortex-M0 core having flip-flops with CAAC-OS backup circuits is fabricated. The SRAM and M0 core can retain data using the backup circuits during power-off; thus, they can perform power gating (PG) with backup time of 100 ns and...
We fabricated a dynamic random access memory (DRAM) using crystalline oxide semiconductor (OS) transistors and not requiring refresh for more than ten days. We call this memory a dynamic oxide semiconductor random access memory (DOSRAM). A crystalline oxide semiconductor is an In-Ga-Zn-oxide (IGZO) semiconductor and has a c-axis aligned crystal (CAAC) structure. A crystalline OS transistor has extremely...
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