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The Factory Integration (FI) focus area of the IRDS is dedicated to ensure that the semiconductor manufacturing infrastructure contains the necessary components to produce increasingly complex and advanced integrated circuits and devices while extending the historical performance vs. cost trends expressed by Moore's Law. This requires taking full advantage of traditional measures (e.g., device feature...
The demand of LiTaO3 (LT) wafer mainly used as substrate of SAW (Surface Acoustic Wave) filter device has been quite increasing in recent years. From the viewpoint of LT wafer's productivity in the polishing process, high removal rate and good recycle stability are required for slurry to eliminate generated damages in the previous process. In this study, the effect of pH and particle size in the slurry...
4H-SiC substrate samples were etched on the surface in order to alter the surface stoichiometry, to make the surface carbon rich using solutions of HF/Ethyl Glycol and HF/H2O. The samples were inspected with AFM, XPS, Raman and electrically (current - voltage) tested by applying probes across two contacts each sample. The results show that in comparison to the unetched samples, the current through...
It is important for the Y2O3 film on the inner walls of RIE chambers to have small particle size and a smooth surface. By using CASP to form Y2O3 films on the inner wall of the chamber in this evaluation, particle generation was decreased by 67% compared with conventional APS.
Unique defect related to the tighter process margins on STI HDP process was investigated. The root cause was Si surface damage due to smaller top width of HDP. The defect was improved by HDP deposition process optimization derived relationship between ion incident angle and sputtering rate during deposition process. It was elucidated that HDP process is important for not only gap filling capability...
To achieve the automotive quality for semiconductor devices represented by “zero defect”, “PAT” is actively applied to outgoing test. “PAT” has been generally used on wafer level test. This time we expanded it to package level test and established the method to detect the characteristic variations and to screen out the outliers.
A new approach in FDC takes advantage of the full sensor trace for fault detection which allows engineers to uncover issues more thoroughly and accurately. The solution utilizes a reference model that intelligently adapts to process changes and requires minimal effort to set up. This greatly reduces the time required to deploy and virtually eliminates maintenance for an FDC system. The elimination...
ASML began collecting data off tools in fabs from ca 1986 for the purpose of diagnostics and troubleshooting. This continued on a manual basis through the 1980's and into the early 1990's when tools began to be connected to the fab network and to the internet. Following manual collection, networked data collection began to take shape and then remote collection began ca 1996. It was from then for the...
One of the key challenges in embedded memory solutions is yield degradation due to additional thermal budget in the process. In this work, we report STI HDP-CVD (Shallow Trench Isolation High-Density Plasma Chemical Vapor Deposition) process as a key contribution factor to yield degradation in embedded memory devices by causing higher degree of silicon dislocations. With optimized plasma sputter/deposition...
The improvement of interconnection technology is becoming a top priority for the operation of high power devices such as SiC at higher temperatures. We proposed a interconnection method using Nickel Nano-particles direct bonding to form bonds between the chip electrodes and substrates. SiC devices assembled with the Ni bonding interconnection were confirmed to be operated successfully in a high temperature...
In this work, we focus on yield analysis task where engineers identify the cause of failure from wafer failure map patterns and manufacturing histories. We organize yield analysis task into 3 stages, failure map pattern monitoring, failure cause identification and failure recurrence monitoring, and incorporate machine learning and data mining technologies into each stage to support engineers' work...
In this paper a simple approach is demonstrated for spatially selective etching of a silicon nitride layer by Reactive Ion Etching (RIE) by using a reusable shadow mask as a separate solid component part. Two ceramics were applied as mask materials: aluminum oxide and boron nitride. After the usage of an aluminum oxide mask several times, the deposition of small aluminum fluoride particles is observed...
We developed an Advanced Fault Detection Method by monitoring motor current for Chemical Mechanical Polisher (CMP) in order to prevent many troubles caused by no contact faults of pad dresser. We considered detection method by monitoring motor current theoretically, and verified the consideration by measurement results of mass production CMP. Furthermore, we succeeded in detecting the faults in two...
This study has demonstrated how to apply datamining technics, Neural Networks (NNs), to estimate the power consumption (kilowatt hour per move, kwh/move) of individual process tool sets in a semiconductor factory, and to analyze the relationships between kwh/move and 19 individual input factors, which included “lot size”, “process time”, “uptime”, “usable machine”, “Q-time constrain”, “sampling rate”...
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