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Decoupling for power rails that demand large current, such as FPGA core, is difficult. The capacitors required for derived solution requires excessive board area for placement and raise system cost significantly. Switcher with high loop Band Width helps reducing the decoupling needs with all the design improvements. In this paper, we proposed a 3-stage behavioral model for switcher to help PCB designer...
Memristor memories provide non-volatile and high density solutions that can overcome some of the challenges faced by CMOS technology. Memristor memories use the memristor as a resistor and depict a logic 1 by a high resistance state and a logic 0 by a low resistance state. Typically, the memristor's resistance range is divided in half, and a state falling in the lower half depicts a logic 0 and the...
The continuous demand for high storage capacities in modern electronic systems has made it more than ever important to find memory technologies beyond CMOS that are able to cope with the challenges at the nanoscale while catering to the requirements of high performance and robust operation. Memristors are excellent candidates for post CMOS memories, owing to their nanoscale nature and their programmability...
This article presents a variability resilient CNFET based 10T S RAM cell. Critical design metrics of S RAM cells are estimated using Monte-Carlo simulations and compared with that of conventional Si-MOSFET based 10T S RAM cell. The CNFET based SRAM cell offers 3.15× and 1.98× improvements in Read Access Time (TRA) and Write Access Time (TWA) respectively. The proposed bit cell also offers 1.94× and...
In the design process of mixed-signal circuit, it is sometimes inevitable to meet partition of reference plane or slots on reference plane for the insulation of noise caused by different voltage level or IC's different noise susceptibility. This paper studies the undesired signal integrity problems caused by single-ended signal references on this kind of non-ideal ground plane. Firstly, a typical...
A new design etching localized electromagnetic band-gap (EBG) structure on the power plane was proposed to mitigate simultaneous switching noise (SSN) in this paper, of which the unit cell is presented based on Sierpinski space-filling curve for the advantage in miniaturizing. The proposed 6-cells localized board shows good performance whose −40dB noise suppression bandwidth is broaden from 177MHz...
This paper uses Fisher information to quantify the identifiability of internal resistance and charge capacity for a first-order nonlinear equivalent-circuit model of a lithium-ion battery undergoing periodic cycling. The paper derives analytic Cramér-Rao bounds on the variances with which a maximum-likelihood estimator can determine these parameters in the presence of white and Gaussian voltage measurement...
To accurately estimate the stage-of-charge of the lithium ion battery, a method based on Multirate Extended Kalman Filter is applied. A equivalent circuit model is built and the mode parameters are estimated based on the experiment data of charging and discharging the battery. The coulomb counting, Single Rate Extended Kalman Filter and Multirate Extended Kalman Filter are used to predict the SOC...
A very simple power supply rejection ratio (PSRR) enhancement technique is presented. It is suitable, among others, for low voltage power low power (LVLP) DC circuits such as biasing circuits. It is shown that a high insensitivity to AC noise in supply rails can be achieved with an almost zero contribution to the total internal noise. This is achieved at the expense of very small additional circuitry...
Non-iterative co-simulation is a prerequisite for the time correct coupling of distributed solved numerical problems. For this coupling approach typically signal-based extrapolation schemes are used to resolve existing bidirectional dependencies between the interacting subsystems. Nevertheless, the introduced coupling errors influence the entire system behavior. In the case of coupled real-time systems...
This paper presents the design analysis and improvement of an Insulated Gate Bipolar Transistor (IGBT) gate drive circuit for the magnet power supplies of accelerator systems. By exploring the effects of the gate driving current and resistance, a low noise gate driver was developed and evaluated. The dv/dt and di /dt values that affect voltage and current spikes are modeled through the physics-based...
A new fundamental theory of ‘coupled processes’ is here applied to be able to explain and to some extent predict the observed instability and spectrum fluctuations of LC and crystal oscillators. The outcome is a ‘spectrum coupling’ theory which is based on the concept of coupled energy exchange between spectrum components. The origin of the coupling can be said to be ‘energy conservation’ as in the...
The quest for lower power consumption has led to aggressive supply voltage scaling till near-threshold and sub-threshold regimes. Reliability represents one of the major concerns in these very low voltage conditions. This paper aims to study the occurrence and propagation of transient errors in noise-affected near and sub-threshold CMOS devices. We have performed SPICE simulation campaigns for 65...
This paper reports on modeling of simultaneous switching noise (SSN) in 3D TSV-based system with multiple IC chips stacked and connected through TSVs. TSVs and other components are modeled using full-wave electromagnetic tools to extract equivalent circuit models. Power distribution network (PDN) combining on-chip and off-chip components are simulated with SPICE. The voltage noise generated by switching...
In this paper, a method called the incident wave excitation method is proposed to incorporate the effects of the coupling noise onto leads of the CAN bus. The equivalent circuit model for two wires (CAN high line and CAN low line) system is firstly derived. The distributed voltage and current sources along the lead excited by the coupling noise can be computed. The set up for the ISO bulk-current...
In this study, we examine a novel insight into the worst-case power noise in power integrity analysis for the core power of an ASIC. It is found that the traditional target impedance method resorting minimizing the peak impedance cannot guarantee a minimal worst-case power noise. The reason is because the worst-case power noise may not occur when the ASIC switching current is modulated at the peak...
In this paper the model of a system for measuring small currents, which generates the digital signal proportional to the input current, was designed. The analysed measuring system is the part of a larger microelectronic mixed-signal integrated chip (SoC — System on Chip), and it is located between the input sensor and the external digital device. Since the part that mostly contributes to the noise...
This paper introduces a leakage model in the frequency domain to enhance the efficiency of Side Channel Attacks of CMOS circuits. While usual techniques are focused on noise removal around clock harmonics, we show that the actual leakage is not necessary located in those expected bandwidths as experimentally observed by E. Mateos and C.H. Gebotys in 2010. We start by building a theoretical modeling...
This note focuses on robust adaptive controller design for Hammerstein systems with symmetric dead-zone nonlinearity and bounded noise. A modified control law is proposed to compensate dead-zone nonlinearity and a new recursive estimator with a nonnegative data weighting is presented to deal with bounded noise. From convergence properties and global stability analysis, we show that parameter estimation...
The speed of general purpose input output (GPIO) continues to increase as more consumer applications utilize “smart” devices. The low-voltage differential signaling (LVDS) is often times the highest speed that GPIO interface needs to support in the mixture of different single ended signaling pins. Although LVDS is differential and somewhat immune to direct signal coupling from other signals, it is...
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