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A discrete-time, switched-capacitor, MASH 2–2 4th order ΣΔ modulator, clocked with frequency of 1 GHz, was designed in a 65 nm CMOS technology. This modulator uses passive integrators based on the ultra-incomplete settling (UIS) concept. Electrical simulations show that the modulator achieves a peak SNDR of 66.8 dB, a peak SNR of 67.7 dB, an ENOB of 10.8 bits and DR of 70dB for a signal with a bandwidth...
A new highly energy-efficient SAR ADC with capacitor constructed bypass-window structure is proposed for low-power biomedical applications. The proposed structure is able to bypass the first few conversion phases when the input signal is within a pre-defined window, resulting in an overall power reduction of 59% when the input signal has a possibility of 80% to activate the bypass-window function...
A third generation of CMOS Active Pixel Sensor (APS) for high and low light imaging (HaLLI) applications is presented. The sensor pixel 128 × 128 array features more feasible and robust circuit design than its predecessors, which allows for remarkable thermal (KTC) noise suppression, bringing the anticipated noise floor below 1e- rms. A new on-focal, column parallel, two phase, Single Slope (SS) 10...
This paper is concerned with the design and optimization of continuous-time active-RC and gm-C filters. We demonstrate how we can maximize the filters' dynamic range (DR) for a given voltage swing, area and power consumption. Using closed-form symbolic expressions, the optimization problems are formulated as geometric programs (GPs) and mixed-integer GPs (MIGPs) that can be quickly solved to find...
A compact 1st-order analog allpass filter operating from a 1.5 V DC supply is presented. The proposed circuit is formed by a handful of subthreshold pMOS transistors, two capacitors and one current source. Verified by circuit simulations using RF Spectre and the AMS 0.35-micron CMOS parameters, the proposed filter consumes 300 nW quiescent power and contributes output noise voltage of 0.03 mVrms while...
This paper investigates and compares eight most frequently used edge radiation suppression methods. Optimization and improvement for each method are discussed to achieve better radiation suppression performance. In addition, many helpful design guidelines are obtained through a comprehensive comparison of these methods, to guide better EMC design for PCB. Base on this work, one can get a good guideline...
In this paper, a comparative investigation on power noise suppression between two blocks in printed circuit boards (PCBs) is presented. Eight noise isolation methods are discussed, including the reference case and seven most frequently used cases. Optimization and improvement for each method are discussed to achieve better performance. Through comparison, useful guidelines are drawn for real designs.
The efficient reduction of EMI noise generated by power converters has been an indispensable technology. In order to meet the requirements of CISPR22, EMI filters have to be equipped with power converters. It is widely known that an EMI filter can be designed more optimally if the designer could know its inherent EMI noise in advance. This paper presents an accurate simulation method for the conducted...
Decoupling core power for modern processors or SOCs is a challenging task due to large power consumption. The decoupling network designed by a commonly used target impedance approach is known to be very pessimistic and very difficult to implement. In this paper, a step surge current is identified as a major source of core power noise. By considering the ramp time of the surge current, we propose a...
Signal return path discontinuities, parasitic inductance and impedance mismatch within interconnects are major factors that contribute to degraded high-speed signal quality in three-dimensional (3D) integrated circuits and systems. In this paper, we apply an alternate power delivery method and a novel I/O signaling scheme to a 3D system to address these issues. Two test vehicles made of stacked PCBs...
Implementation of many high-speed systems, such as ADCs, is dependent on high performance comparators. In this paper two structures are presented for high-speed, low-noise and accurate applications. Both of the circuits are based on a positive feedback structure of two back-to-back inverters. First circuit is an improved rail-to-rail folded cascode amplifier in which an active bias circuit is utilized...
In this paper, three-stage operational transconductance amplifiers (OTAs) for use in switched-capacitor (SC) circuits using nanometer CMOS technologies are described. Two three-stage OTAs, one with nested-Miller compensation (NMC) as a basic compensation scheme and another with damping factor control frequency compensation (DFCFC) as an advanced compensation scheme are presented. The open-loop small-signal...
A novel Y-cap. connection structure for Class II offline SMPS applications is proposed to suppress the common mode (CM) noise. With proposed concept, the size of the CM choke can be greatly reduced while satisfying the EMC standard. Furthermore, the inner shielding layer inside power transformer which is normally a must in product design to comply with the EMC standards can be eliminated for higher...
Quantification analysis of input/output current facilitates the optimal design of the interleaved PFC boost converter. This paper presents a method to calculate these currents both in switching cycle and mains half cycle for interleaved PFC AC/DC boost converter, which is valid for this converter with arbitrary number of phases operating at continuous conduction mode (CCM) and discontinuous conduction...
This paper introduces the detrimental effects of voltage regulator noise on ΔVBE-based temperature sense circuits. The work began when a significant temperature reporting inaccuracy was observed on a commercial DC-DC power conversion module. In the paper, the observed problem will be discussed, and a Spice model presented which allows the issue to be simulated. The main part of the work, however,...
EMI filter design is often influenced by the noise transformations between the common-mode (CM) and differential-mode (DM), which is mainly due to the system unbalance. In this paper, the analysis of the intrinsic and EMI filter unbalance existing in the EMI noise propagation path of the dc-fed three-phase motor drive system is carried out. CM path unbalance in the circuit model is investigated with...
Since the loss of input rectifying diode bridge in the conventional PFC circuit reduces the efficiency, the bridgeless PFC circuit has been proposed. However, the performances of EMC in some bridgeless PFC circuits are unsatisfactory. In order to improve noise performance, the noise mechanism should be investigated as the first step. In this study, common mode noise current of conventional bridge...
In designing reliable power distribution networks (PDN) for power integrity (PI), it is essential to stabilize voltage supply to devices on chip. We usually employ decoupling capacitor (decap) to suppress the noise generated by the switching of devices. There have been numerous prior works on how to select/insert decaps in chip, package, or board to maintain PI, however optimal decap selection is...
The paper describes an approach for semi-symbolic analysis of mixed-signal systems that contain discontinuous functions, e.g. due to modeling comparators. For modeling and semi-symbolic simulation, we use extended Affine Arithmetic. Affine Arithmetic is currently limited to accurate analysis of linear functions and mild non-linear functions, but not yet discontinuities. In this paper we extend the...
Pipeline Analog to Digital Converters (ADCs) are widely used in applications that require medium to high resolution at high acquisition speed. Despite of their quite simple working principles, they usually form rather complex mixed-signal blocks, particularly if digital correction and calibration are considered. As a result, pipeline converters are difficult to test and diagnose. In this paper, we...
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