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Pedestrian trajectory prediction is important in various applications such as driverless vehicles, social robots, intelligent tracking systems and space planning. Existing methods focus on analysing the influence of neighbours but ignore the effect of the intended destinations of pedestrians which also plays a key role in route planning. In this paper, we propose a novel two- stage trajectory prediction...
Memristor is a two terminal passive circuit element that can be used in non-volatile storage applications. In addition, memristor can also be used to implement logic functions. This paper presents the design of adder circuits in memristor crossbar. We have used the MAGIC design style to implement the gates required for the adder circuits. The implementation is based on in-memory computing where the...
Drug Drug Interactions (DDIs) can cause harmful effect. Two shared tasks, DDIExtraction 2011 and DDIExtraction 2013, have been held to promote the implementation and comparative assessment of natural language processing techniques in the field of the pharmacovigilance domain. However, few model can meanwhile achieve state-of-the-art performance on both tasks. A major reason is the lack of representation...
This paper proposes a power-efficient capacitor-array-based digital-to-time converter (DTC) using a constant-slope approach. Fringe-capacitor-based digital-to-analog converter (C-DAC) array is used to regulate starting supply voltage of the constant slope fed to a fixed threshold comparator. The proposed DTC consumes only 15 μW from a 1V supply, while achieving fine resolution of 103 fs when running...
Many Internet of Things (IoT) applications benefit greatly from low-power long-range connectivity. A promising technology to achieve the low-power and long-range requirements is seen in LoRaWAN, a media access control (MAC) protocol maintained by the LoRa Alliance and leveraging Semtech's patented LoRa radio modulation technology. LoRaWAN provides three different device classes (A, B and C), which...
A narrowband low-power low-sensitivity, IoT TxRx compliant to ARIB STD-T-67 & T-30, is presented. It employs (1) an injection locked IQ-divider without power-hungry high speed logic gates and flip flops to generate 25% duty cycle LO that drives the mixer following a simultaneously noise and impedance matched gm-boosted LNA, and (2) A dedicated pilot-less direct automatic frequency correction of...
Network Functions Virtualization (NFV) is a new network paradigm that has been strongly promoted from both scientific community and telecom industry, where network functions (NFs) such as firewalls, load balancers, gateways among others, are virtualized, isolated from middleboxes and housed on one or more industry standard computing nodes. One of the main challenges for service providers when they...
A simulation method of non-uniform interface charges in pMOSFETs was presented in this paper. By using the 2D device simulation software, it increases the non-uniform interface charges array and calculation module. Bonded with the device negative bias temperature instability NBTI (Negative Bias Temperature Instability) degeneration model, the pure bias NBTI (Pure Drain Bias NBTI) degradation impact...
This paper presents a low-power all-digital first-order single-bit delta-sigma time-to-digital converter (TDC) with a differential bi-directional gated delay line time integrator. The differential time integrator features low power consumption accredited to the use of only one bi-directional gated delay line in performing time integration, full compatibility with technology scaling, rapid time integration,...
The trend towards the digitalization of our homes is motivated by the development of hardware and software platforms that have been researched in recent years. As in the Internet of Things, building a single, global platform that enables communication with a myriad of devices for home automation is virtually impossible. The platform proposed in this work deals, in isolation, with the problems in each...
Adders are the main components in digital designs not only in additions but also in filter designing, multiplexing, and division. The circuit performance depends on the design of base adder. The demand of high-performance VLSI (very large scale integration) systems is increasingly rapidly for used in small and portable devices. The speed of operation is depends on the delay of the basic adder and...
Among the new technologies that have emerged in the past few years to address the limits of CMOS, Nanomagnetic Logic (NML) is one of the most promising. NML circuits are composed of nanosized elongated magnets that operate at room temperature with ultra-low switching power dissipation. To create an NML circuit, the designer must place the magnets in such a way that, through magnetostatic interactions,...
In this work a model of the oscillator with inductive coupling of the gates operating at ultralow voltage is presented and experimentally verified. The topology needs a bias voltage at the gates, and we propose a circuit called starting block to generate this voltage from the supply. Theoretical behavior is compared with experimental results, showing good agreement. The circuit, which behaves as astable...
Asynchronous quasi-delay-insensitive (QDI) circuits are a promising solution for coping with aggressive process variations faced by modern technologies, as they can gracefully accommodate gate and wire delay variations. Furthermore, due to their inherent robustness, such circuits are also promising for deep voltage scaling applications, where delays are orders of magnitude larger. However, QDI design...
Operating CMOS circuits at subthreshold supply voltages is an attractive solution for substantial energy reduction, at the expense of strong timing performance degradation, for a broad range of battery operated appliances. One of the challenges of this approach in current technology nodes is the reduced available noise margin when operating at low supplies. This paper evaluates the Static Noise Margin...
A new method for reducing power and area of standard cell ASICs is described. The method is based on deliberately introducing clock skew without the use of extra buffers in the clock network. This is done by having some flipflops, called sources, generate clock signals for other flipflops, called targets. The method involves two key features: (1) the design of new differential flipflop, referred to...
The dual-channel SiC MESFET is ameliorated for application in high power fields. The current density and breakdown performance are simulated by using ISE-TCAD. The maximum saturation current density and breakdown voltage are about 420 pA/pm and 155 V, respectively, which are larger than those of the dual-channel 4H-SiC MESFET, 270 pA/pm and 141 V. The resultant maximum output power density is 7.4...
A concatenated LSTM (Long Short-Term Memory) architecture for CHP (combined heat and power) heat load forecasting was presented. Firstly, input data was normalized and separated into historical climate and heat load data. Then feed the separated data into two LSTM neural networks. Finally, the two LSTM models were concatenated as inputs to another LSTM model followed by two dense layers. Relu function...
This article presents a substantial review of nonlinear memristive circuits based on Zdenek BIOLEK model alonside an innovator design developed within the Hewlett-Packard laboratories. HP realized a physical implementation of memristors by placing two layers of titanium dioxide between two electrodes. The first layer is partially doped with oxygen gaps and behaves like a semiconductor and the second...
This paper reviews the use of UHF double class-E (class-E2) topologies for dc/dc power conversion. After introducing this attractive resonant converter in the context of the time-reversal duality principle, two different lumped-element networks are described for appropriately terminating the drain of the switching devices. Recent implementation examples, taking advantage of GaN HEMT processes, are...
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