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Presents the introductory welcome message from the conference proceedings. May include the conference officers' congratulations to all involved with the conference event and publication of the proceedings record.
X-band power performance of N-polar GaN HEMTs is reported, including 2-tone results at 10GHz that demonstrate an OIP3/PDC linearity figure of merit of 12dB at a drain voltage of 20V, utilizing tuning of fundamental, second and third harmonic terminations. Compared to available linearity results of GaN HEMTs at 10GHz, the device technology presented here demonstrates the best such ratio reported at...
We actualized a silicon photonics (SiPh)-based coherent optical subassembly (COSA) with a compact and low-height package for the next-generation transceiver form factors. We integrated optical functions required for transmitting and receiving digital coherent optical signals into a single SiPh chip. The COSA is applicable to 100-Gbps dual-polarization quadrature phase shift keying and 200Gbps dual...
This paper describes how the use of nanostructures can significantly increase the performance of GaN transistors. 100–400 nm fins have been defined underneath the gate electrode of AlGaN/GaN transistors to increase the gate modulation efficiency of these devices and to allow for the tuning of the threshold voltage. The proper design of these fins allows not only an improvement in the DC performance...
Power consumption is the most challenging requirement as bit rate increases for a given form factor. This paper reports a 90mW 11.3Gb/s 4.4Vp-p Mach-Zehnder Modulator (MZM) driver that enables a 750mW tunable transmitter suitable for SFP+ form factor for 80km transmission system.
In this letter, a microwave annealing (MWA) method for Ohmic contact applied to InAlN/GaN high electron mobility transistor (HEMT) is the first time. The feature of MWA method is low operating temperature (450°C∼550°C). By using this technique, MWA-HEMT can achieve a low Ohmic contact resistance and smoother Ohmic contact surface than traditional rapid thermal annealing (RTA). The situation of Indium...
This paper reviews the use of UHF double class-E (class-E2) topologies for dc/dc power conversion. After introducing this attractive resonant converter in the context of the time-reversal duality principle, two different lumped-element networks are described for appropriately terminating the drain of the switching devices. Recent implementation examples, taking advantage of GaN HEMT processes, are...
This paper reports on a 660 GHz transmitter using InP HEMT technology. The transmitter features a x18 multiplier chain, sub-harmonic mixer, and a power amplifier at the output. Tradeoffs in the upconverter topology are discussed, including transmit noise power, RF filtering, and phase noise. With SSPA at the output, this up-converter achieves the highest reported power to date at this frequency. This...
This paper reviews a set of architecture and circuit techniques that have enabled data rates beyond 10Gb/s, and explores a range of design challenges and considerations as we move to higher data rates. In particular, we review ADC-based designs and their challenges and tradeoffs, including ADC resolution, oversampling ratio, and power consumption.
Highly-scaled Indium Phosphide (InP) transistor technologies have bandwidths extending into the terahertz (THz) frequency regime (0.3–3 THz). The high transistor bandwidth can be exploited to both extend circuit operation to THz frequencies and improve system performance at millimeter wave and sub-millimeter wave frequencies. InP heterojunction bipolar transistor (HBT) technologies offer wide bandwidths,...
A fully differential, high input power handling, ultra-wideband, variable gain low noise amplifier MMIC for a monostatic MIMO radar was designed in a 130 nm SiGe BiCMOS Technology. The amplifier features an extensively high RF input power survivability, high power handling, ultra-wideband operation of 0.1–50 GHz and a linearly variable gain with 12 dB tuning range. The measured differential mode noise...
This work presents a GaN RF power amplifier with a common-source-common-gate (CS-CG) linearization technique, demonstrating device-circuit interactions using the physics-based MIT Virtual Source GaNFET (MVSG) model. A few device parameters are carefully chosen to investigate their effects on the circuit performance, as well as to suggest how to fabricate or choose a better GaN device for RF power...
A power- and area-efficient Low Voltage Differential Signaling (LVDS) AC coupled receiver for short links is presented. The receiver accommodates the wide LVDS common-mode range without requiring large, board-mounted AC coupling capacitors or a slow, rail-to-rail input stage. Instead, a small, on-chip coupling capacitance generates a pseudo return-to-zero (RZ) pulse that is latched into the receiver...
The first modular 4-channel frontend for exploring phased array communications at a carrier frequency of 300 GHz was developed. A metamorphic HEMT process with a gate length of 35 nm was the key enabling technology for the integration of each transmit and receive channel. All channels implemented the quadrature direct conversion architecture. The measured RF bandwidth exceeded 55 GHz for the receive...
A process-, temperature-and supply-insensitive DC-to-62GHz 4-phase quadrature generator for clock signals with 25% duty cycle was manufactured in a production 55-nm SiGe BiCMOS technology. The purely digital circuit is based on a 2.5 V bipolar-CML static divider, AND gates and inverter stages, and operates with input signals from DC to 124 GHz while consuming 178 mW. Measurements were conducted with...
The rapid growth of data center traffic, driven by cloud technology adoption, has propelled the development of a variety of spectrally efficient modulation formats, such as 4-level pulse amplitude modulation (PAM4), quadrature phase shift keying (QPSK) and quadrature amplitude modulation (QAM). High speed CMOS DSP-based transceivers provide complex equalization scheme to compensate for the channel...
A 94-GHz 16-element phased array transmitter IC in a 130 nm BiCMOS technology is reported. The IC integrates 16 transmitter front ends with two independent outputs, a 1-to-16 power splitter, an IF-to-RF up-converter, a frequency synthesizer with continuous lock detection, an IF/baseband, and digital circuitry including serial interface and front-end memory within an IC size of 6.7 mm × 5.6 mm. A milimeter-wave...
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