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Due to their linear and highly symmetrical structure, lattices are becoming of a great interest as potential transmission schemes. Lattice codes suggest a common view of channel and source coding and new tools for the analysis of information network problems. Several constructions have been proposed to build these lattices, some of which are based on multi-level coding and multistage decoding such...
SRAM based FPGAs that are based on a nanometer technology with denser integration schemes are used most widely now-a-days. When the radiation in the environment strikes any one of the configuration frames, it would seriously affect the functionality of the SRAM based FPGA which leads to Multiple Bit Upsets (MBUs). These MBUs affect a larger number of configuration frames in SRAM based FPGA. So in...
Solid-state disks (SSD) are widely used storage devices in current consumer electronics. However, the enhancement of SSD data retention and reliability given the high read/write activity are critical research topics. Many error correction codes (ECC) have been developed in the literature to solve the aforementioned issues by embedding ECC design in flash memory. Bose-Chaudhuri-Hocquenghen (BCH) code...
The performance of NAND flash based solid-state drives (SSDs) is highly dependent on the application's read and write characteristics [3], where "intensity" is defined as ratio of read:write requests, and "write- hot/cold" considers the write frequency. Moreover, NAND flash memory's reliability degrades with write/erase (W/E) cycling. To optimize performance and reliability, conventional...
Fast decoder of BCH code (31, 16, 7) which based on matrix algorithm of syndromes computation and parallel data processing was developed. Functional blocks of developed device based on block-based design were described. Device testing with coding and decoding modes and 50 MHz frequency was conducted.
We investigate the error performance of both multilevel polarization shift keying (MPOLSK) and spatial modulation based MPOLSK (SM-MPOLSK) architectures for multiple-input-multiple-output (MIMO) communication over atmospheric turbulence channels. We first show that bit groups corresponding to each signalling dimension of these architectures are affected unequally from the turbulence induced scintillation...
Polar codes, introduced by Arikan, achieves the capacity of symmetric channels with “low encoding and decoding complexity” for a large class of underlying channels. Recently, polar code has become the most favourable error correcting code in the viewpoint of information theory due to its property of channel achieving capacity. Although the fully parallel polar code based encoder architecture processes...
We investigate the error performance of both multilevel polarization shift keying (MPOLSK) and spatial modulation based MPOLSK (SM-MPOLSK) architectures for multiple-input-multiple-output (MIMO) communication over atmospheric turbulence channels. We first show that bit groups corresponding to each signalling dimension of these architectures are affected unequally from the turbulence induced scintillation...
Continuous technology scaling makes NAND flash cells much denser. As a result, NAND flash is becoming more prone to various interference errors. Due to the hardware circuit design mechanisms of NAND flash, retention errors have been recognized as the most dominant errors, which affect the data reliability and flash lifetime. Furthermore, after experiencing a large number of programm/erase (P/E) cycles,...
This paper investigates the design of low-complexity error correction codes for the verification step in continuous variable quantum key distribution (CVQKD) systems. We design new coding schemes based on quasi-cyclic repeat-accumulate codes which demonstrate good performances for CVQKD reconciliation. Given quasi-cyclic repeat-accumulate codes' commercial maturity, low implementation complexity and...
The serial communication function of microprocessor is often used in a MCS — 51 microprocessor application system. Because of the influence of the working environment, data will be disturbed and mistake will occur in the process of transmission. In this paper, based on the serial port of the microprocessor, fault-tolerant technology of data communication can be achieved. For the interference problem...
In this paper, we propose an improved design of expanding window fountain (EWF) codes over the binary input additive white Gaussian noise (BIAWGN) channels. The encoding process is modified to get almost regular variable node degree distributions. Compared with the conventional EWF codes, our proposed scheme can lower the error floor. Furthermore, we combine the EWF encoding process with unequal power...
Compressive Sensing (CS) provides a solid theoretical framework for sparse signal recovery. In this work, we concentrate on recovering the foreground object which can be represented as a sparse vector using wavelets. The method revolves around the CS framework by judiciously using the complex field BCH codes and the syndrome as measurements to achieve our goal of robust background subtraction using...
Non-volatile memories are paid attention to as a promising alternative to memory design. Data stored in them still may be destructed due to crosstalk and radiation. We can restore the data by using error-correcting codes which require extra bits to correct bit errors. Further, non-volatile memories consume ten to hundred times more energy than normal memories in bit-writing. When we configure them...
The evaluation of error correction code (ECC) for NAND flash memory is increasingly complicated by the increasing bit error rate in memory. The concept of error-free information capacity is proposed to evaluate the performance ECC of NAND flash memory. The new method simultaneously considers the capacity and reliability of NAND flash memory. Low-density parity-check (LDPC) codes with a medium code...
As a result of technology scaling, spatial multi-bit soft errors have been becoming a big concern for SRAM-based storage structures, such as caches, buffers, and register files, in the design of reliable computer systems. Conventional techniques, such as bit interleaving or stronger coding, cannot provide the designers with effective solutions to the problem of reliable address generation in instruction...
In this paper, we propose a design rule of a modified quasi-cyclic structure for bit-interleaved coded modulation with iterative decoding (BICM-ID). The proposed structure is especially favorable for low-complexity hardware implementation. In addition, it will be shown that the proposed structure effectively removes low-weight codewords, which in turn greatly improves error-floor behaviors as compared...
This paper proposes a scalable solution for obstructing and detecting malicious activity as well as erroneous events during mission mode operation of untrusted memories. The approach obfuscates data written into a memory and remaps the location of memory contents in a manner difficult for an attacker to predict, making it harder for a Hardware Trojan to be deterministically triggered or controlled...
Resistive random access memory (RRAM) has been recognized as one of the most promising candidates for next generation non-volatile memory due to its simple structure and excellent scalability. However, poor reliability is a serious issue for RRAM memory applications. To improve the reliability and endurance, many researchers changed the cell material, process and structure. Here, in this paper, we...
In this paper we proposed correcting codes-based on modular arithmetic — to improve the data transmission robustness in wireless sensor networks. We developed a new method and algorithm for the detection and correction of multiple errors. The codes are characterized by high correction characteristics as well as the simplified coding procedure1.
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