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In this paper an induction motor drive system based on a fault-tolerant cascaded H-bridge converter is presented. The proposed system is composed by an induction motor fed through a 13-level cascaded H-bridge converter. In this case a neutral shift method has been implemented for the CHB converter in order to make it fault-tolerant. The proposed system has been modelled and tested in Matlab-Simulink.
This paper presents the design of an average controller based on differential flatness for a DC/DC Boost power converter. This controller allows the system output voltage to perform the trajectory tracking task. When designing control laws based on the average model of switched systems a modulator is necessary to appropriately govern the converter switch. Thus, the switched implementation of the designed...
In this work, constellation constrained (CC) capacities of a series of non-orthogonal overloading transmission schemes are derived in AWGN channels. All these schemes follow a similar transmission structure, in which modulated symbols are spread on to a group of resource elements (REs) in a sparse manner, i.e., only a part of the REs have nonzero components while the others are filled with zeros....
This paper proposes a new design and implementation of a single stage three-phase multi-level inverter (MLI). The suggested inverter is modular type and can be generalized by connecting the basic modular cells in series configuration. In addition, it can be operated with symmetrical/asymmetrical Dc-voltage sources. The proposed MLI is successfully modulated using sinusoidal pulse width modulation...
Sphere Decoding (SD) algorithm was proposed to effectively find the Maximum Likelihood (ML) solution. However, the computational complexity of SD is still too high when SNR is low or the dimension of the problem is large. In this paper, we propose three improved schemes based on contraction factor to reduce the complexity of sphere decoding. In the proposed schemes, a factor was introduced for speeding...
Bit-interleaved coded modulation with iterative decoding (BICM-ID) are suitable for continuous fading channels. In addition, BICM-ID using differential encoding can avoid the rate loss due to pilot symbols. Conventional differential encoding for uncoded modulation was used for BICM-ID. In this paper, we propose new differential encoding of 16APSK (amplitude and phase-shift keying) signals for BICM-ID...
MMCs are normally designed to operate in the linear region of the PWM. This limits the peak-to-peak phase voltage in the AC port to be lower than the DC port voltage. It is possible to increase the AC voltage beyond this limit by the use of overmodulation strategies. However, this is at the price of an increase in the harmonic content (THD) of the voltages and currents, and consequently, of a decrease...
In this paper, a control strategy of a modular serial parallel resonant converter (SPRC) modulator system is presented and verified by simulations. The system is based on two SPRC modules forming an input series output parallel (ISOP) stack. To obtain the given output voltage of 115kV, 8 of these ISOP stacks are connected in parallel at the input and in series at the output, forming an input parallel...
This paper presents transistor-level design of a 150 MHz bandwidth continuous-time (CT) ΔΣ modulator in a 0.85 V 28 nm CMOS process. Architectural-level design tradeoff for the high bandwidth requirement is discussed. A stand-alone DAC calibration scheme that suits the high-speed modulator is proposed for linearization. Simulation results show that the modulator achieves signal-to-noise-and-distortion...
In this paper Minimum Mean Square Error (MMSE) precoding for the Preprocessing aided Spatial Modulation (PSM) transmission scheme is investigated. PSM is capable to transmit data both in the spatial domain and in the modulation domain. We derive the upper bound for the Average Bit Error Probability (ABEP) for MMSE precoded PSM data transmission and we show by means of simulations that the bound is...
Using a multi-stage perturbation technique to compensate intra-channel nonlinearities, the computational complexity is reduced by a factor up to 9.3 and the Q-factor improvement over linear compensation is increased from 1.7 dBQ to 2.7 dBQ.
Selected mapping (SLM) is a well-known peak-to-average power ratio (PAPR) reduction technique for orthogonal frequency division multiplexing (OFDM) systems. Recently, a low-complexity SLM scheme, called Class-III SLM scheme, was proposed, which performs only one inverse fast Fourier transform (IFFT) to generate alternative OFDM signal sequences. By randomly selecting the cyclic shift and rotation...
This paper describes a novel family of modified quasi-Z-source buck-boost multilevel inverters with reduced switch count. The inverters are derived by means of the modified inverter configuration with quasi-Z-source networks. The main benefits of the proposed solutions lie in the increased amount of levels with all possible sequences: reduced THD, reduced voltage stress on the transistors and size...
OFDMA and SC-FDMA were chosen as strong candidates for uplink transmission in 3GPP-LTE. OFDMA is a full-fledged multicarrier modulation scheme but has the disadvantage of high PAPR. SC-FDMA achieves low PAPR by spreading the constellation points over entire bandwidth but lacks efficient spectral utilization and prone to Inter Carrier Interference (ICI) at cell edge. Grouped Frequency Division Multiple...
A novel combined approach of SLM (Selective Mapping), PTS (Partial Transmit Sequence) and DSI (Dummy Signal Insertion) is proposed to diminish PAPR (Peak to Average Power Ratio) and OBI (Out of Band Interference) in OFDM (Orthogonal Frequency Division Modulation) systems. The efficiency of OFDM decreases while the cost of installing HPA (High Power Amplifier) increases when the PAPR factor is high...
This paper proposes a new compensation technique to reduce the clock jitter effects for the continuous-time sigma-delta (CT-ΣΔ) modulator by using divided-by-n (D-N) feedback DAC waveform. There are two types of clock jitter: independent clock jitter (random jitter) and accumulated clock jitter (deterministic jitter). This technique provides a useful approach to solve one of the critical non-idealities,...
Underwater acoustic (UWA) communication attracts lots of attention due to its rapid development in maritime applications. In order to meet the increasing service requirements, multicarrier modulation techniques are desired for underwater communication implementations. In this paper, we study three types of multicarrier modulation schemes, e.g., the orthogonal frequency division multiplexing (OFDM),...
Aiming at the large instantaneous common-mode voltage in traditional space vector modulation strategy for two-stage matrix converter (TSMC), on the basis of analyzing the laws of common-mode voltage, an improved modulation strategy to reduce common-mode voltage was proposed. To suppress common-mode voltage effectively, the sector of rectifier stage was doubled into twelve sectors from six sectors,...
In this paper a Nearest Level Control with open loop approach for modular multilevel converter (MMC) is proposed. By using open loop approach it is possible to suppress circulating currents without using feedback controllers. Moreover, with this method, both N+1 and 2N+1 levels (N=number of sub-modules) can be obtained at the output voltage. In addition, the voltage quality is improved and the total...
A low-power high-resolution Delta-Sigma modulator for audio codec, designed in Global-Foundries BCD 0.18µm 1P4M CMOS process, is presented. The modulator employs a fourth-order single-loop feedforward topology with a 3bit-quantizer. A novel structure of Switched-Opamp (SO) utilizing current-starvation and Slew-Rate (SR) boosting is adopted to meet the requirements of high performance and fast settling...
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