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The resistance switching characteristics of several metal oxides has been reported recently for nonvolatile memory applications (NVM). However, various issues such as the switching mechanisms, switching uniformity, scalability and reproducibility have not yet been solved. In this paper, we discuss the recent progress of switching mechanisms and switching behaviors of various materials.
Excellent nonpolar resistive switching behavior is reported in the Cu doped ZrO2 memory devices with the sandwiched structure of Cu/ZrO2:Cu/Pt. The ratio between the high and low resistance is in the order of 106. Set and Reset operation in voltage pulse mode can be as fast as 50 ns and 100 ns, respectively. Multilevel storage is considered feasible due to the dependence of ON-state resistance on...
A persistent current switch (PCS) is used for superconducting applications, such as superconducting magnetic energy storage (SMES) system. The authors have proposed a mechanical switch of Y-Ba-Cu-O (YBCO) bulk as a mechanical PCS. In previous study, in order to investigate the contact characteristics of the switch, 50A current tests were performed and the contact resistance between two YBCO contacts...
A novel dual-layered electrolytic resistance memory is proposed and its high retention ability at room and elevated temperature is successfully demonstrated. This dual-layered memory cell was fabricated as cross-point structure with active material, Cu containing Ge0.3Se0.7 based solid electrolyte and a thin insulator layer stack, sandwiched between an inert Pt bottom electrode and an oxidizable Cu...
Ultra-low current resistive switching in sputtered Cu/SiO2/Pt and Cu/SiO2/Ir structures was investigated. Both Cu and SiO2 are commonplace in silicon integrated circuits and hence the material system is CMOS compatible. The switching characteristics were very similar to those observed in other solid electrolytes so that the mechanism is assumed to be the same, i.e., based on the formation and rupture...
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
A physical yet analytical phase change memory (PCM) model simultaneously accounting for thermal and electrical conductivities is presented. Due to the physics based nature of the model, the essential temperature from heating and cooling of PCM during operation is instantaneously updated. More importantly, the model can be applied to non-conventional circuit design technique. We show that for the first...
We report thermoelectric characterization of Bi2-xSbxTe3 (x = 0.5, 1.0, and 1.5) synthesized by a solvothermal method using DMF as solvent. For Bi2Te3, the size of the edge and thickness of the hexagonal nanoplatelets are 200-250 nm and 20-25 nm, respectively. Bi2Te3 nanosheets appear to grow epitaxially from the surface of the Te tubes, which forms in the first step and acts as the template for the...
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