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In this paper, a novel floating gate MOS (FGMOS) based current controlled differential voltage current conveyor (CCDVCC) structure is proposed. Major advantages of the proposed structure are circuit simplicity and low power dissipation. Only 6 MOS and 2 FGMOS transistors are employed in the design. Furthermore, as an application of CCDVCC a current controlled universal filter is presented. The CCDVCC...
This paper describes the expansion of the operation margin of the SRAM by optimizing the supply voltage condition. To find the optimum voltage, the whole SRAM circuit is designed, which includes the worst case memory cells for the read and the write operations considering the local Vth fluctuation. By the SPICE simulation using 45-nm parameters, successful operation is obtained for wide Vth range...
In this paper, a new bipolar junction transistor (BJT) voltage gain-controlled modified current feedback amplifier (VGC-MCFOA) is presented. As application example using the presented new active building block a novel first-order allpass filter employing single VGC-MCFOA and four grounded passive elements is proposed. Reported filter structure provides both current- and transimpedance-mode transfer...
This paper analyses a complete self-powered vibration based energy scavenging system. For the purpose of the analysis, the energy scavenging system (comprising of a SPICE model of Piezoelectric Bender Generator (PBG), an integrated semi-active bridge rectifier and a voltage regulator circuit) has been implemented in SPICE and presented in this paper. The semi-active bridge rectifier proposed in this...
VLSI circuits of 45 nm technology and beyond are increasingly affected by process variations as well as aging effects. Overcoming the variations inevitably requires additional power expense which in turn aggravates the power and heat problem. Adaptive supply voltage (ASV) is an arguably power-efficient approach for variation resilience since it attempts to allocate power resources only to where the...
A modified regulated cascode structure having high output swing capability is presented. This structure is used in the implementation of a current mirror. The current mirror possesses wide input and wide output swing capabilities, suitable for low voltage operation. P-SPICE simulations at 0.25 ??m CMOS technology validate the proposed current mirror for currents from 30 nA to 220 ??A, at 1 V with...
In recent times, dynamic supply voltage scaling (DVS) has been extensively employed to minimize the power and energy of VLSI systems. Also, sub-threshold circuits are becoming more popular. At the same time, the reliability of VLSI systems has become a major concern under Single Event Upsets (SEUs). SEUs are very problematic even for circuits operating at nominal voltages. With the increasing demand...
This paper presents a method that optimizes the performance of CMOS amplifiers with respect to gain, bandwidth, noise, distortion and power. The method is performed directly in SPICE without the aid of mathematical models or external software routines. The method works in all SPICE programs from Cadence to the student version of PSPICE. The technique is based on tuning the voltage of specific nodes...
This paper proposes a novel floating gate MOSFET (FGMOS) based voltage-controlled grounded resistor (VCGR). The FGMOS is used to cancel the nonlinearity term present in the drain current equation of MOSFET operating in ohmic region. The implementation of nth order tunable high-pass filter using the proposed VCGR is also suggested. The proposed VCGR is simple, compact, accurate, and with low power...
An outstanding challenge for realizing nanoelectronic systems is nano-interface design, i.e., how to precisely access a nanoscale wire in an array for communication between a nanoscale system and the outside world. Existing nanoelectronic addressing methods are based on implementation of binary decoders, which requires unrealistic precise layout design in nanotechnology. In this paper, I propose voltage...
A Bluetooth low-intermediate frequency complex channel filter has been designed using 0.25??m CMOS technology model. The filter is based upon transconductor-capacitor structure. The filter is implemented using a balanced output transconductor with an extended range of input voltage and enhanced linearity. The filter is based on a 6th order lowpass Butterworth approximation, has a bandwidth of 1 MHz...
A current-based close loop track-and-hold circuit with a speed of 50 MS/s and 8-bit resolution for plusmn0.8 V input range is implemented using a voltage-control current source and a current switch. The proposed circuit has the advantage of high input impedance and stable output. SPICE simulation using 0.35 mum SMIC CMOS technology with plusmn1.65 V supply showed that the proposed track-and-hold circuit...
This paper presents a current controlled fully balanced second-generation current conveyor circuit (CFBCCII). The proposed circuit with the fully balanced structure can restrain odd order harmonic distortion and common-mode disturbing signal effectively. Furthermore, the circuit has the property of current controllability, which can adjust its interior parameter via tuning bias current. PSPICE simulation...
The implementation of complex functionality in low-power nano-CMOS technologies leads to enhance susceptibility to parametric disturbances (environmental, and operation-dependent). The purpose of this paper is to present recent improvements on a methodology to exploit power-supply voltage and temperature variations in order to produce fault-tolerant structural solutions. First, the proposed methodology...
In this work, the bulk-gate controlled circuit to improve the power supply ripple ratio (PSRR) of a Low Dropout Regulator (LDO) which deteriorates due to lowering power consumption is proposed. Designing with 0.25 mum CMOS process, the simulation results by HSPICE shown that the proposed circuit provides a high performance of PSRR even though 1/10 of the power consumption is reduced compare to the...
The dramatic increase in leakage current, coupled with the swell in process variability in nano-scaled CMOS technologies, has become a major issue for future IC design. Moreover, due to the spread of leakage power values, leakage variability cannot be neglected anymore. In this work an accurate analytic estimation and modeling methodology has been developed for logic gates leakage under statistical...
Driven by the proliferation of implantable and self-powered electronic devices, low-voltage, low-power, high-efficiency DC-DC power converters are on high demands. This paper first reviews the state-of-the-arts charge pumps, with focus on power loss minimization, power stage architectures and control signaling. A new four-phase complimentary charge pump is then proposed. By employing the techniques...
The paper concerns modeling the nonisothermal characteristics of switch-mode voltage regulators (VRs) consisting of the boost converter with discrete semiconductor devices and a monolithic current-mode pulsewidth modulation controller. New electrothermal hybrid models of a p-n diode and a power metal oxide semiconductor transistor, as well as the electrothermal model of the monolithic UC3842 controller...
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