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This paper presents a kind of architecture design of bus based CNC system of domestic-processor based on Loongson and analyzes both the design of module structure of domestic-processor based on Loongson and the function and implementation method of MII bus based CNC main control board. These studies can solve the problem of chip of domestic NC system chip and have great significance to improve the...
A multi-channel CCD signal processing system is introduced in this paper. It is used to drive CCDs to operate, to receive output image signals from CCD, then to implement data processing and encoding, finally to send out the data to a receiving system. Three boards in traditional remote sensing camera electronic system are integrated into one board with the same function in this system. FPGA is used...
In this paper, we present a UART-USB interface converter design based on FPGA, which implements asynchronous serial communication protocol and USB protocols conversion. Design is implied by Hardware Description Language using modular design, it can be integrated into different SoC system. After Modelsim functional simulation and FPGA simulation with two computers, we verify the feasibility of the...
RADAR, an acronym for Radio Detection and Ranging, is used for various purposes both military as well as civilians. A fire-control radar (FCR) is specifically designed radar to provide information (mainly target azimuth, elevation and range) to a fire control system in order to calculate a firing solution (i.e. information on how to direct weapons such that they hit the target(s)). This Paper mainly...
The coordinated matching process is a most challenging task in a present NIDS system over the increase in malicious attacks. Many digital systems have been invented to accommodate increased network traffic rate. The overall NIDS efficiency is degraded when the number of intrusions in the database increased. It will lead the demands of concurrent pattern matching scheme in any Field Programmable Gate...
Conventional reverse vending machines use complex image processing technology to detect the bottles which make it more expensive. In this paper the design of a Smart Bottle Recycle Machine (SBRM) is presented. It is designed on a Field Programmable Gate Array (FPGA) using an ultrasonic range sensor which is readily available at a low cost. The sensor was used to calculate the number of bottles and...
Currently, with the development of high performance computing, multicore system and heterogeneous system have become the transformation that is taking place. However, Promoting performance of processor has encountered bottlenecks of heat and power by means of Moore's Law, one or more CPUs can't meet requirements of a large number of computing. The use of Heterogeneous Computing Platform is becoming...
Recent fixed and mobile wireless communication systems have attracted researchers to propose new techniques and methodologies that greatly improve performance. For example, adaptive techniques have improved the wireless channel efficiency while decreasing the overall power consumption. They consist in reconfiguring parts of the global system automatically according to different parameters. In parallel,...
From the point of view of system development, this paper introduces a FPGA based parallel AD acquisition board and its implementation process. The board uses 24-bit 8 channels of TI to synchronize the sampling chip ADS1278 to synchronize the input signals of the 8 input signals. FPGA uses Altera's EP2AGX45F572, Nios II processor running on it as the core of data processing. Communication between CY7C68013...
The rising demands for computational performance is a current trend in our increasingly digital world. Keeping up with this trend poses a challenge for every embedded processor system. This paper proposes the use of reconfigurable processor architectures to increase "on demand" processing performance while running a specific target application. The reconfiguration is used to interchange...
The presented paper deals with design, co-simulation and comparison of three controller design methods (Internal Model Control, Pole-Placement, PID by Modulus Optimum) applied in the control of processes with complex dynamics. The presented and tested methods guarantee robust stability and high performance of controlled system. Proposed algorithms were successfully implemented in Matlab-Simulink using...
Network on Chip system establishes better on-chip communication for a chip multiprocessor system than the traditional bus based system. In the network design, the selection of routing algorithm and the network topology play a vital role in the performance of on-chip interconnects. One of the problems in routing is congestion of traffic which hampers the performance of the system to a great degree...
Using the structure of FPGA and DSP to achieve real-time image processing system, Preprocessing the camera data with FPGA running speed and parallel processing ability and compressing transmission image by DSP. In the process of the image data of the dark, using the logarithm stretching algorithm, Increasing the image enhancement module, the image brightness uneven distribution becomes clear. Using...
Single processor architectures are unable to provide the required performance of high performance embedded systems. Parallel processing based on general-purpose processors can achieve these performances with a considerable increase of required resources. However, in many cases, simplified optimized parallel cores can be used instead of general-purpose processors achieving better performance at lower...
Several Human Interface Technology applications require reliable palm rejection. Palm rejection in upcoming touch or Pad technology has a need of hardware implementation with requirements of low power and small area. This paper introduces a hardware implementation of a real-time palm rejection based on Wronskian Determinant. This detection algorithm offers regularity, low complexity and accuracy as...
This paper introduces one of the first efforts conducted at NASA's Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9...
This paper presents the implementation of optical seam tracking for a laser welding process with parallel image processing on a smart camera. Real-time extraction of the seam location and direction is enabled by a combination of massively parallel focal plane processing on a Vision Chip and Hough-transform based analysis on an FPGA. The implementation of all analysis within a single embedded camera...
In this paper, we propose the hardware architecture for high-speed transaction logging of forex trading system. In forex trading market, the trading volume of currencies is growing larger every year. In order to provide real-time processing of large volume and high availability service, we focused on the two types of the workload, where the bottleneck occurs, and conducted workload analysis. The bottleneck...
Wireless open access research platform is one of the latest trend in the field of programmable hardware. It's reference library is openly accessible whereas hardware is believed to be of high performance. This platform can be used for designing and implementing state of the art wireless systems from basic elements to the end user level. WARP board houses a VIRTEX-7 Field programmable gate array. Software...
In order to promote the high frequency performance of open architecture CNC system, an embedded CNC controller combining FPGA (Field Programmable Gate Array) technology and real-time Ethernet communication bus was designed, which consisted of an embedded ARM (Advanced RISC Machines) processor and an FPGA. An open source CNC software running under Linux operating system was customized to accommodate...
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