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Eye tracking is the method of tracking the user's eye gaze or where he is looking relative to his head. Its applications and studies were mostly done on general purpose computers. This study focuses on implementing an eye tracking system on a Field Programmable Gate Array (FPGA) and specifically a text-typing application. Using state machines implemented in Verilog – a hardware description language...
In today's modern era a theoretical based approach is followed to determine the amount of chlorophyll present in leaves of plants. But in this paper a practical based approach is followed to generate an architecture of simple, low cost Chlorophyll estimator using Field Programmable Gate Array(FPGA). Color of leaf can give an indication for assessing plant health and nutrient. Performance analysis...
For the economic development and progress of any country, roads play an important role by providing transportation ease for goods as well as for passengers. The number of vehicles on road is increasing day by day which are controlled by the traditional Traffic Light Controller in the countries like India and other developing countries. In traditional Traffic Light Controller, fixed time is allotted...
Today, the phenomena of using internet network and multimedia application had increasing growth. Transformation and transmission of information or image over the network can be easily done by public. Therefore, security is an important issue in communication and storage of data; particularly images. Due on this issue, encryption is found to be one of the efficient ways to ensure security. Thus, this...
This paper presents a compression system optimized for the reduction of data from pulse digitizing electronics. Such systems are widely used in High Energy Physics experiments for the collection of signals from calorimeters, Time Projection Chambers and in general all detectors that produce a signal amplified and/or shaped to a linear pulse. The Time Projection Chamber of the ALICE experiment will...
This paper proposes a novel implementation of the core processors, the integer transform and quantization for H.264 video encoder using an FPGA. It is capable of processing the picture frames with the desired compression controlled by the user input. The algorithm and architecture of the components of the video encoder namely, integer transformation, quantization were developed, designed and coded...
This paper describers the validation of AES IP Core, based matlab2007a. There are many authors (Saqib et al., 2003) have discussed the detailing implementation of AES IP core; but this paper mainly emphasizes portability and flexibility in the validation of the Verilog IP codes.
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