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This, paper presents the FISH (FPGA-Initiated Software-Handled) framework which allows FPGA accelerators to make system calls to the Linux operating system in CPU-FPGA systems. A special FISH Linux kernel module running on the CPU provides a system call interface for FPGA accelerators, much like the ABI which exists for software programs. We provide a proof-of-concept implementation of this framework...
Heterogeneous Multi-Processor Systems-on-Chip, whether ARM or x86 based, promise further performance scalability by complementing temporal compute in CPUs/GPUs with spatial compute in digital circuitry. Dynamic partial reconfiguration (DPR) extends such compute architectures by making use of different spatial compute elements over time. Novel research [1] presents means for operating DPR by the Linux...
This article proposes a modification of the standard Linux scheduler for a support of a reconfigurable heterogeneous multiprocessor system. The standard Linux scheduler is limited to a homogeneous multiprocessor system only. The addition of the processing core with a different feature requires modification of a decision algorithm of the scheduler as a heterogeneous task cannot be executed on any processing...
This paper design an embedded controller module based on ARM according to the VME bus specification to meet the increase of VME controller performance, interface optimization and the increasing demand of hardware and software compatibility. Hardware-wise, we design the peripheral circuit for ATSAMA5D3 microprocessor, achieve a network port, USB port and other external interfaces, and use the FPGA...
Embedded system designs and applications have been more common today. The aim of this study is to tell how to implement open source OpenRISC based SoC's, which can be used for embedded system designs, on FPGA and how to install Linux Kernel. It makes OpenRISC based SoC's different from other Soc's due to it's modifiable open source codes for processors and all peripherals, and no license fee demand...
The use of heterogeneous computing resources, such as Graphic Processing Units or other specialized coprocessors, has become widespread in recent years because of their performance and energy efficiency advantages. Approaches for managing and scheduling tasks to heterogeneous resources are still subject to research. Although queuing systems have recently been extended to support accelerator resources,...
Nowadays, many industrial synchronization systems rely on the Precise Time Protocol (PTP or IEEE1588) that provides sub-microsecond precision time transfer. However, there are some applications such as next generation of telecommunication systems (LTE-A & 5G) or scientific infrastructures that have stricter timing requirements that must guarantee the timing service regardless of traffic load conditions...
FPGA vendors now include hardened IPs to form a system-on-chip (SoC) making it easier to build embedded systems. However programming and integrating hardware accelerators (devices) into these systems present a challenge. The OpenCL standard has become accepted as a good programming model for managing devices, or hardware accelerators in the context of embedded systems on FPGAs, due to its rich set...
A software/hardware co-design system for a Trax solver is proposed. Implementation of Trax AI is challenging due to its complicated rules, so we adopted an embedded system called Zynq (Zynq-7000 AP SoC) and introduced a High Level Synthesis (HLS) design. We also added Deep Q-Network, a machine learning algorithm, to the system for use as an evaluation function. Our solver automatically optimizes its...
Modern industrial process instrumentation systems like radar based flow meters demand for scalable modular hardware platforms to meet the requirements for integration in heterogeneous Cyber-Physical Systems (CPS). Recent advances in System on Chip (SoC) technology allow integration of multichannel frequency modulated continuous wave (FMCW) radar sensors with real-time signal processing capabilities...
A sensor platform is a station equipped with extensive sensor and communication systems, which provide space based detection and alert capabilities. It consists of low-power, embedded computing devices known as motes, which use sensors to collect measurements from the physical world and its inhabitants. In this paper, an ARM-based sensor platform running a Linux Operating System is designed and implemented...
In order to improve the real-time performance and reliability of the drive system for infrared image array, this paper designs an embedded drive system. With MPC8315 as the processing core, this system takes reflective memory network as the transmission unit. In order to verify and analyze the performance of the embedded drive system for the infrared image array, this paper sets up a test platform...
This article presents a design of a dynamically reconfigurable hybrid multiprocessor system on a chip (SoC), where individual reconfiguration partitions (RP) are time multiplexed by demands of a task. Scheduling the RPs is designed to be done by a modified Linux kernel. Design is partially implemented on the experimental platform, tested by multiple benchmarks and will be extended in the future.
FPGAs are a key enabling technology for rapid and efficient system prototyping and initial commissioning of newly developed integrated circuits. One major aspect is the setup and control of interface components between devices under test (DUT) and the FPGA infrastructure. So, as to maintain high flexibility in conjunction with the ability to deal with changes of requirements and use cases, as well...
Wireless research infrastructure is a central tool in performing applied research. It enables the verification and demonstration of theoretical results in practice. Wireless research infrastructure at the Centre for Wireless Communications (CWC) has been built using second generation second generation wireless open access research platform (WARPv2). The WARPv2s are well suited for wireless research...
The distributed computing, mobile computing, and colaborative systems paradigms have induced an increasing interconnection of computing systems using communication networks. Allowing access to multiple mobile devices to a communication network has created the need to design autonomous applications, with a low energy consumption, able to monitor and to create statistics about the bandwidth consumption,...
Recent Xilinx field programmable gate arrays (FPGAs) enables embedded systems to adapt their hardware functionalities at run-time using dynamic partial reconfiguration (DPR). This paper presents a generic file system to support standard operating systems (OS) for efficient FPGA resources management and implementation of intellectual property (IP) cores using DPR technology. The proposed generic file...
Embedded system intends to realize portable systems, while reducing chip connect, device size and power dissipation. These systems have obtained great tallness due to their ample fields of application and, it's lower costs compared with the traditional computer systems. The target of this paper is to show how to design and implement an embedded system based on a soft core processor, and how to port...
The Digital Talking Book (DTB) player is a device for the visually impaired to read, search, navigate and bookmark written material using DAISY and EPUB standards. This paper presents the design and implementation of a DTB player in an FPGA-based embedded system to play audio books containing MP3 (Daisy) files and utilize Text to Speech Synthesis (TTS) for text only books or EPUB books.
SoCs can be implemented on a single FPGA, offering designers a unique opportunity for Embedded Systems. Instead of defining a fixed architecture early in the design process, the reconfigurable platform allows architectural redesign to meet the system's specific needs. However, the ability to instantiate new modules in the reconfigurable hardware provides a unique set of challenges for integration,...
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