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This paper proposes the design of a controller managing the fault tolerance of multi-FPGA platforms, contributing to the creation of a reliable system featuring high flexibility and resource availability. A fault management strategy that exploits the devices' reconfiguration capabilities is proposed, the Reconfiguration Controller, focus of this paper, is the main component in charge of implementing...
According to the shrinking feature size of the VLSI circuits it is expected that nano scale devices and interconnections will introduce unprecedented level of defects and architectural designs need to settle with the uncertainty result at such scales. Several approaches for implementing the fault tolerance systems are already investigated. Most of these methods are applicable also in the case of high...
The problem of planning the overlaps of multiple alternative configurations is critical to maximize the reliability of a reconfigurable fault-tolerant system based on field programmable gate arrays. To address the problem, an unnecessary assumption made in previous work is removed and a second-order approximation domain-partition method is proposed. Experimental results on ITC99 benchmark circuits...
The following topics are dealt with: allocation and scheduling for MPSoCs and NoCs; power grid analysis; large interconnect network analysis; online testing; fault tolerance; model based design and test; transaction level modeling based validation; application specific network-on-chip design; systematic analogue design automation; soft error analysis; concurrent testing; processor and memory design;...
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