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A dynamic bias pre-amplifier based latch type comparator is designed in a 65nm CMOS process. Its performance is compared with the double-tail latch-type comparator fabricated on the same chip in terms of energy consumption, input referred noise and speed. Measurements demonstrate that the proposed dynamic bias pre-amplifier based comparator consumes 2.8 times less energy per comparator operation with...
This paper is to study the stabilizability and stabilization issues of linear dynamical systems based on the delayed and noisy feedback control. For the general linear systems, the necessary conditions and sufficient conditions for mean square and almost sure stabilizability are deduced and the corresponding feedback controls are designed according to the generalized algebraic Riccati equation. It...
A noise immunity improvement for hybrid position observers for brushless dc motor drives is proposed. A finite state machine is used to detect Hall-effect sensor transitions to determine if these transitions are true transitions or the result of momentary glitches. This filter causes a delay in the detection of the Hall-effect sensors that is compensated in the proposed observer. The proposed observer...
This paper presents the design and analysis of a 2∶1 multiplexer. The conventional circuit of 2∶1 multiplexer(MUX) is used for the calculation of different parameters like power consumption, noise, delay, leakage power, etc. The multiplexer designed in this paper is suitable for low-power applications and works on very low supply voltage. Multiplexer is a digital circuit, it consists of 2N input and...
This paper presents a resistor-free self-regulating CMOS ring oscillator (RO) whose oscillation frequency is insensitive to supply noise variations. The proposed RO design achieves self-regulation by adopting a cross-coupled dual latch-based scheme; Proper custom device sizing of the cross-coupled latches can improve supply noise immunity and frequency stability compared to a simple inverter design...
This paper presents the design of a low leakage CMOS based switch mode power supply. The switch mode power supply converts the available deregulated A.C or D.C input supply to a regulated D.C output supply. This paper reviews the limitations of conventional linear regulated power supply and focuses on the advantages of switch mode power supply (SMPS) technique. The high frequency transformer used...
The performance of the conventional bearings-only tracking (BOT) from a single passive sensor largely depends on the sensor platform maneuvers. This paper presents a new BOT approach based on fusion from two heterogenous bearings-only sensors residing on the same moving or stationary platform. The two sensors are an ESM/EO with negligible propagation delay and an acoustic sensor with significant propagation...
In recent years, communications systems through mains, known as PLC (Powerline Communication), have received a lot of interest as part of intelligent networks or smart grids, as well as for multimedia applications at homes. In broadband PLC, systems using multicarrier modulations allow the mitigation of selective frequency fading in the channel. Nevertheless, these modulations require accurate time...
Phase synchronization results in distorted grid contain a certain amount of oscillations, failing to meet the requirement of high-performance grid-connected power converters. Moving Average Filter (MAF) and Delayed Signal Cancellation (DSC), as well as their derivations, i.e. Cascaded MAF (CMAF) and Cascaded DSC (CDSC), are main solutions to this problem. In this paper, the mathematical models of...
This paper contributes to establish Individual-Phase Decoupled P-Q Control as a methodology for operating VSCs for both symmetrical and asymmetrical conditions. This paper extends the scope of the Individual-Phase Control of a D-STATCOM (voltage source converters) by showing that it can implement active filtering under asymmetrical operating conditions. This is accomplished by a combination of: (i)...
This paper investigates the performance of iterative learning control (ILC) scheme that is adopted in networked control systems with data dropouts, where a linear discrete-time stochastic system can be rewritten as a super-vector formulation. In this paper, two types of compensation schemes are employed for data dropouts occur in both the output signals and control input signals during the signals...
Simulating the time-variance of vehicular channels correctly remains a challenging topic. We are interested in parsimonious mathematical channel models, in which only significant groups of multipath components (MPCs) are included. The MPCs are grouped in the delay-Doppler domain, which enables the development of cluster-based channel models. However, the characterization of time-variant vehicular...
Cluster based channel models can be used to reduce the computational complexity. For vehicular communications, the environment changes rapidly due to the high velocities of the transmitter and receiver, resulting in fast changing cluster parameters. In this paper, we present an automatic cluster identification and tracking algorithm in order to consistently characterize the evolution of cluster parameters,...
The most valuable element of biometric security systems are the personal features of its users. Characteristics of individuals are unique and must be protected. We focus in this paper on methods of protection of user identity in systems based on keystroking. Our approach assumes giving minimal information to adversaries and the best responsiveness of the system regardless of user representation or...
This paper is concerned with the operator-based nonlinear networked control systems with packet errors. In communication network, packet may include errors caused by noise in network, and in conventional control method, these packets are regarded as lost packets. This means information of control signals is also lost completly, even if the disturbance caused by errors is acceptable for control systems...
In this paper, we present a differential current-mode pulsed flip-flop (DCMPFF) for low-power clock distribution using a representative 45nm CMOS technology. Experimental results show that the DCMPFF has 47% faster clock-to-output (CLK-Q) delay than a traditional voltage-mode (VM) pulsed flip-flop. When the DCMPFF is integrated with a differential current-mode clock distribution, the differential...
A 12-bit 20-MS/s charge redistribution successive approximation register analog-to-digital converter in a 65-nm CMOS technology is presented in this paper. To address the issue of long DAC settling time in bit-conversion, an improved internal clock generator is proposed. In addition, a novel SAR controller is introduced to minimize the critical path and improve the conversion speed. Simulation results...
When a continuous time sigma delta modulator (CT ΣΔM) is overloaded, its output signal to quantization noise ratio (SQNR) decreases when the ΣΔM's input power is increased over a certain value. In this paper, the range of quantizer gains that cause a CT ΣΔM to overload is determined, and this range of values is used to determine the maximum input signal power that prevents overload. To validate the...
This paper proposes an active resonant power supply noise cancelling with fast voltage drop sensor using the combination of delay-locked loop (DLL) and vernier time-to-digital converter (TDC). Also, we propose the capacitor selector circuit realizing the active insertion of capacitors in less silicon area. These components enable one clock noise detection with fine resolution. Simulation results show...
Eye movement related artifacts are the most significant source of noise in EEG signals. Thus, a special approach to reduction of their influence is required. However, most of currently used methods of detecting and filtering eye movement related artifacts require either an additional recording of noise signal, or are not suitable for real time applications, such as Brain-Computer Interfaces. In this...
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