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The article describes the hardware architecture of computational units for the construction of GLONASS / GPS navigation user equipment. The described possible route to improve of some architectures based on field programmable gate arrays (FPGAs).
Modular multiplication, addition, and subtraction being the core operation of Elliptic curve public(ECC) system, the decrease of area and the merging of structure have been a hot topic in recent years. This paper first analyzes the difference between multiplication type and addition type of modular multiplier. Then, Combined with the structural characteristics of the modular adder, and mixing modular...
Decimal Arithmetic Hardware Research accelerated phenomenally in the last decade with introduction of Decimal Floating Point formats in IEEE 754–2008. ‘Addition’ being one of the primitive arithmetic operations has attracted numerous literary proposals involving the 8421 standard BCD code as well as nonstandard decimal digit representation codes (4221, 5211 etc.). This paper concentrates on Fixed...
Convolutional Neural Networks are being studied to provide features such as real time image recognition. One of the key operations to support HW implementations of this type of network is the multiplication. Despite the high number of operations required by Convolutional Neural Networks, they became feasible in the past years due the high availability of computing power, present on devices such as...
The high number of cells employed in a Modular Multilevel Converter represents a challenge for the control hardware. Some authors have proposed the use of digital communications to simplify the assemblage and maintenance in such converters, but the latency they add has undesirable consequences for the closed-loop performance. In this paper, we propose a model-based compensation of the latency that...
In recent years there has been a growing interest in Internet of Thing, Big Data and Mobile Internet. With the rapid growth of the amount of data in the embedded environment, using a traditional embedded processor is hard to satisfy the requirements of big data processing. Sorting is one of the fundamental operation in data processing and is also frequently used for search, filter, feature analysis...
Designing wireless industrial communication for factory automation is a serious task because novel radio systems have to compete with well established wired fieldbus solutions. The requirements to achieve equivalent reliability and latencies impose challenging demands on design and implementation. In this paper, we propose a hardware accelerator for highly adaptive and parallel medium access allowing...
The Stability issues in PHIL simulations has always been of major concern due to the inherent delays within the interface devices. Various control algorithms are proposed in literature to overcome this problem. The paper uses a simple filtering technique followed by compensation blocks to overcome the stability problem. This paper further proposes a mathematical approach to consider the stability...
Network virtualization offers flexibility by decoupling virtual network from the underlying physical network. Software-Defined Network (SDN) could utilize the virtual network. For example, in Software-Defined Networks, the entire network can be run on commodity hardware and operating systems that use virtual elements. However, this could present new challenges of data plane performance. In this paper,...
The paper suggests very fast electronic solutions for priority buffers that take data from many potential sources, accumulate them in a register, and output the most priority item in run time in such a way that as soon as a new value arrives it is included in the set with all previously received and untreated items and properly handled. It is shown that such circuits are required for real time embedded...
This paper presents the design for a prototype tactical dynamic spectrum access (DSA) mobile ad hoc network, where the network is organized into clusters operating on a single frequency. The frequency may be changed autonomously by the network in response to jamming or interference, after some frequency switching delay. The network node design is implementable on a software defined radio (SDR), such...
Block traces are widely used for system studies, model verifications, and design analyses in both industry and academia. While such traces include detailed block access patterns, existing trace-driven research unfortunately often fails to find true-north due to a lack of runtime contexts such as user idle periods and system delays, which are fundamentally linked to the characteristics of target storage...
Large number addition is the fundamental operation in cryptography algorithms. In this paper, we accelerate large addition in hardware design by introducing non-least-positive form, which is beneficial to parallel processing. An implementation of 256-bit signed array accumulator with our method shows an improvement of 18% in speed and 15% in area-delay product compared with traditional design.
We have proposed a method of designing embedded clock-cycle-sensitive Hardware Trojans (HTs) to manipulate finite state machine (FSM). By using pipeline to choose and customize critical path, the Trojans can facilitate a series of attack and need no redundant circuits. One cannot detect any malicious architecture through logic analysis because the proposed circuitry is the part of FSM. Furthermore,...
Toom-Cook algorithm is a well-known method to compute large integer multiplication. In this paper, we propose an implementation of 272 bit multiplier based on Toom-Cook algorithm and finish the hardware implementation. Sythesizing with Synopsys Design Compiler in the SMIC 65nm CMOS process, the result shows that the design based on Toom-Cook can acheive at least 22.9% less on area and 43.4% less on...
Recently, the IEEE P1918.1 standardization activity has been initiated for defining a framework for the Tactile Internet. Within this activity, IEEE P1918.1.1 is a task group for the standardization of Haptic Codecs for the Tactile Internet. Primary goal of the task group is to define/develop codecs for both closed-loop (kinesthetic information exchange) and open-loop (tactile information exchange)...
Unpredictable value of carry bit in the summation of carry-sum is an annoying issue preventing carry-sum from being applied to designs with sign extension. In this paper, we propose a methodology to determine the carry bit of the carry-sum form output generated by Booth encoded multiplier without final addition. We discover that this carry bit is a constant "1" in traditional unsigned Modified...
Network emulators are powerful tools that allow to test and characterize network equipment and protocols. The market offers several measurement solutions. The most widely adopted are software network emulators and among them surely free or open-source emulators are the most used especially in research contexts. Unfortunately, software network emulators are not distributed with technical support and...
Internet-of-things (IoT) paradigm exploits the Distributed Measurement System (DMS) to execute measurements. Each node of the DMS has computational and communicative capabilities, and can be equipped by sensors and measurement instruments. Therefore, it can be assumed as Smart Object (SO). The availability of mobile SO (MSO) (cars, smartphones, drones) is taken into consideration in the research to...
A ring oscillator physical unclonable function (RO PUF) is an application-constrained hardware security primitive that can be used for authentication and key generation. PUFs depend on variability during the fabrication process to produce random outputs that are nevertheless stable across multiple measurements. Unfortunately, RO PUFs are known to be unstable especially when implemented on an Field...
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