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A low quiescent current low-dropout regulator (LDO) applied in energy harvest system is presented in this paper. With super-source follower, the LDO has only one pole within loop unity gain bandwidth. And current buffer compensation is utilized to maintain the phase margin under the full range of load current. In order to decrease the power dissipation on the resistors of voltage divider, the resistors...
Distributed on-chip low dropout (LDO) voltage regulators have become common due to the increasing number of on-chip voltage domains, dynamic voltage scaling, and the need for high quality power. Due to the current limitations of on-chip LDOs, hundreds of these regulators are required to deliver high quality power within modern high performance microprocessors. As the number of parallel connected LDOs...
The well-known active power-frequency and reactive power-voltage amplitude droop control is widely used in the coordinated control of parallel inverters in microgrids. However, the dynamics of the conventional droop method is slow due to the low-pass filters used for power calculation purposes. Stability concerns also exist in the conventional droop method. This paper proposes a novel droop control...
A power distribution grid exhibits the characteristics of a weak grid owing to the existence of scattered high-power distributed power-generation devices. The grid impedance affects the robust stability of grid-connected inverters, leading to harmonic resonance, or even instability in the system. Therefore, a study of the stability of grid-connected inverters with high grid impedance based on impedance...
Ultra low quiescent, wide output current range low-dropout regulators (LDO) are in high demand in portable applications to extend battery lives. This paper presents a 500 nA quiescent, 0 to 100 mA load, 3.5–7 V input to 3 V output LDO in a digital 0.35 μm 2P3M CMOS technology. The challenges in designing with nano-ampere of quiescent current are discussed, namely the leakage, the parasitics, and the...
This paper presents a new low-voltage output capacitorless low dropout (LDO) voltage regulator for System-on-Chip (SoC) applications. A low-impedance loading network is introduced at the output of LDO to achieve full range stability from 0 to 100 mA load current at a 100 pF parasitic capacitance load. No minimum output load current is needed whereas the quiescent current is made low. Thus, it improves...
In this paper, a method which uses impedance match to improve Power Noise Rejection Ratio (PSRR) of low dropout voltage regulator (LDO) and to make robust frequency compensation is put forward. Based on the method, a novel LDO is designed. The simulation results are as follows. PSRR>80dB@10kHz, the load regulation at 0-250mA is less than 15mV, and an external capacitor of more than 0.8uF can realize...
Biasing digital CMOS circuits with rapidly changing supply current requires fast load regulation. Integrating the regulator with no external components on the same chip with the load circuit is attractive for applications with stringent volume and weight requirements. The purpose of this paper is the analysis, design and comparison of three structures of high-speed linear regulators implemented in...
An interactive, menu-driven computer program has been developed to analyze the small signal performance of electrical power systems. The Small Signal AC (SSAC) program enables the analysis of an arbitrary power system configuration using generic components. A component may be specified in terms of canonical circuit parameters or by selecting the entire component from a library. New component models...
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