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With the fast increasingly use of image and video processing in many aspects, the requirements for high performance and high-quality systems lead to the use of reconfigurable computing to accelerate traditional image processing platforms. In this work, an efficient runtime adaptable floating-point Gaussian filtering core is proposed to achieve not only high performance and quality but also kernel...
This paper presents a real-time Kvazaar HEVC intra encoder for 4K Ultra HD video streaming. The encoder is implemented on Nokia AirFrame Cloud Server featuring a 2.4 GHz dual 14-core Intel Xeon processor and Arria 10 PCI Express FPGA accelerator card. In our HW/SW partitioning scheme, the data-intensive Kvazaar coding tools including intra prediction, DCT, inverse DCT, quantization, and inverse quantization...
A system-on-chip field gate programmable array (FPGA)-based video processing platform for human detection in complex scenes is presented. This study details the hardwarebased implementation of a human detection algorithm in 2D/3D scenes, including the capture, video processing, and display stages. The proposed method is implemented by extending a previously proposed method that uses features extracted...
This study proposes a system-on-a-chip, field-programmable gate array (FPGA)-based real-time video processing platform for human action recognition. We provide the details of a hardware implementation for real-time human activity recognition in 3D scenes, including capture, processing, and display. The proposed platform is implemented by adding a two-stage preprocessing step to improve the results...
Undergraduate students rapidly implement a partially-reconfigured, real-time video processor on the Xilinx PYNQ board. The video processor performs various real-time operations including Sobel edge detection, embossing, averaging, an interactive Pong game, etc., using a separate partially-reconfigurable bit-stream for each distinct function. Selection of image-processing functions is accomplished...
Intraoperative thermographic imaging, associated with time-resolved data analysis, is used to identify and visualise functional areas and pathological tissue in brain surgery. In this contribution we propose a hardware-software system for real-time pre-processing, fusion, and analysis of concurrent infrared and whitelight recordings. As a proof-of-concept, a digital temporal filter is applied to the...
Pedestrian detection is a very important application of embedded real-time vision systems. It is essential in Advanced Driver Assistance Systems (ADAS) and Advanced Video Surveillance Systems (AVSS). The most widely used method involves a combination of Histogram of Oriented Gradients (HOG) features and Support Vector Machine (SVM) classifier. It offers quite high detection accuracy at the cost of...
In recent years, there has been an increasing growth of using vision-based systems for tracking the players in team sports to evaluate and enhance their performance. Vision-based player tracking has high computational demands since it requires processing of a huge amount of video data based on the utilization of multiple cameras with high resolution and high frame rates. In this paper, we present...
The paper discusses the application of System on Chip devices for processing Megapixel video streams. The domain of image processing using high resolution images is very demanding in the scope of calculating power and frequently exploits special processing hardware. The progress of integration technology brings about SoC which are capable of meeting such processing demands. Characteristics of FPGA...
Many n-D signal processing applications in industrial environments require real-time processing of data. We propose a technique for realization of motion feature extraction in video images on low performance computing hardware. The realization is based on a 2-D spatio-temporal wave digital filter (WDF) using SDRAM-based shift operators. This enables the usage of different effective shared bus widths...
In this paper, hardware implementation of edge detection at real time video signals using Sobel, Robert, Prewitt and Laplacian filters based on FPGA is explained. Besides, filters are compared in many ways. Edge detection is an elemantary and fundamental tool for image segmentation and feature extraction. Very high speed hardware like FPGA's are used to implement the image and video processing algorithms...
In order to achieve real-time processing of the image with high frame rate and high resolution, the image processing system has been required to have higher data transmission bandwidth and data processing capacity. Multi-core DSP is used as the key processor to solve the problem of data transmission and processing bottleneck, which the current image processing platforms are facing. The characteristics...
In order to achieve real-time processing of the image with high frame rate and high resolution, the image processing system has been required to have higher data transmission bandwidth and data processing capacity. Multi-core DSP is used as the key processor to solve the problem of data transmission and processing bottleneck, which the current image processing platforms are facing. The characteristics...
Digital video stabilization is an important video enhancement technology that aims to remove unwanted camera vibrations from video sequences. Trading off between stabilization performance and real-time hardware implementation feasibility, this paper presents a feature-based full-frame video stabilization method and a novel complete fully pipelined architectural design to implement it on field-programmable...
This paper presents the design and the implementation of edge detect filter is optimized for video processing applications on FPGAs. It outlines efficient hardware architecture of spatial filtering (edge detection) for video processing system. This architecture offers a substitute through a graphical user interface that mixes MATLAB, Simulink and Xilinx System Generator that is an extension of Simulink,...
We present a field programmable gate array (FPGA) based implementation of the H.264 video decoder algorithm. The novelty of our design is that the communication between the decoder modules is done using a network-on-chip (NoC). This makes our design scalable and easily integrated within larger future NoC based systems, where the same hardware platform can host other algorithms such as compression,...
A high definition(HD) wide dynamic video surveillance system is designed and implemented based on Field Programmable Gate Array(FPGA). This system is composed of three subsystems, which are video capture, video wide dynamic processing and video display subsystem. The images in the video are captured directly through the camera that is configured in a pattern have long exposure in odd frames and short...
Due to high rise in demand for video processing on hardware FPGA implementation of various image processing algorithm has become a necessity. Lot of research work is being done in the field of image processing and video processing on FPGA. In this paper we specifically concentrate on working Background identification, moving object detection and tracking. Keeping in mind the previous work dons in...
In the last two decades the advancement in data communication techniques was significant, during the explosive growth of the Internet and demand for using multimedia has increased. Video and audio data streams require a bandwidth to be transferred in an uncompressed form. Several ways of compressing multimedia streams evolved. Image and video compression is one of the major components used in video...
Streaming processing is an important technology that finds applications in networking, multimedia, signal processing, etc. However, it is very challenging to design and implement streaming applications as they impose complex constraints. First, the tasks involved in the streaming applications must complete the computation under a latency constraint. Second, streaming systems are built under more and...
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