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Due to the heterogeneity and complexity of systems-of-systems (SoS), their simulation is becoming very time consuming, expensive and hence impractical. As a result, design simulation is increasingly being complemented with more efficient design emulation. Runtime monitoring of emulated designs would provide a precious support in the verification activities of such complex systems. We propose novel...
The CANDLES experiment is a study of the double beta decay of nuclei. The detector consists of two scintillators. One is the crystal that acts as a source of double beta decay and a scintillator. The other is a liquid scintillator, which is used for gamma-veto. The total light collected from the liquid scintillator is on the same order of magnitude as that of the ...
This paper proposed a reconfigurable and flexible SoC architecture for various applications of wireless sensor network (WSN). The hardware-software system reconfiguration can be easy done because the systems utilize FPGA based SoC as a platform. The system also supports various network topologies and interfaces. The supported interface consists of I2C, SPI, USART, etc. The main processing system of...
This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened...
Zero-Degree Detector (ZDD) is a new Detector of Beijing Electron Spectrometer III (BESIII) for both double gamma event detection and luminosity monitoring to substitute the old luminosity monitor. A new luminosity readout is described in this paper which is designed in double width AMC/MTCA form factor with a large Xilinx Virtex5 FPGA in addition to normal electronic signal formation. A FPGA embedded...
Several countries have invested in technologies for Smart Grids. Among such protocols designed cover this area, highlights the DNP3 (Distributed Network Protocol version 3). Although the DNP3 be developed for operation over the serial interface, there is a trend in the literature to the use of other interfaces. The Zigbee wireless interface has become more popular in the industrial applications. In...
Wireless Sensor Network (WSN) technology has been getting a lot of attention in recent years due to its low-cost, portability, easy deployment, self-organisation, and reconfigurability. Two main challenges faced by designers are availability and power/energy management for WSN. This paper presents a design for a wireless sensor node, which provides automated reconfiguration for both availability and...
We present a multi-channel coincidence-counting module for use in quantum optics experiments. The module counts up to 4-fold coincidences at up to 84 MHz. Combined multiple modules can count M-order coincidences among N inputs.
Although many studies proved that it was possible to embed application servers on a chip with limited resources, security considerations were generally marginalized. Due to their frontal position, application servers are subject to an increasing number of threats. These vulnerabilities are actually ignored in most cases mainly because of cost constraints. This paper introduces the concept of Secure...
Speeding is recognized as a major contributing factor in traffic accidents on freeway. In order to reduce speed-related accidents, accurate real-time speed limit enforcement system is very critical to freeway. This paper presents an automatic speed limit enforcement system on freeway based on cameras and the Field Programmable Gate Array (FPGA) implementation to achieve this objective. Taking the...
Monitors are small IPs that check critical systems, such as radio-altimeters that on-line control the landing phase in modern planes. It is essential to get correct information and avoid erroneous messages from these monitors. Asynchronous monitors are very robust to the environment variations; they remain functional in a wide range of power supplies or temperatures, and can reliably monitor synchronous...
Power gating is an effective technique for reducing leakage power which involves powering off idle circuits through power switches, but those power-gated circuits which need to retain their states store their data in state retention registers. When power-gated circuits are switched from sleep to active mode, sudden rush of current has the potential of corrupting the stored data in the state retention...
This article reports the first results on fast and accurate power evaluation in arithmetic operators. The proposed method uses two steps: 1) accurate useful activity evaluation, 2) fast glitching activity estimation. The first step is based on circuit emulation using FPGA. Activity counters are inserted into the low-level description of the evaluated operator. The modified description is synthesized...
In this paper, we proposes the concept of creating a circuit identifier, or digital fingerprint, for field programmable gate arrays (FPGAs). The digital fingerprint is a function of the natural variations in the semiconductor manufacturing process that cannot be duplicated or forged. The proposed digital fingerprint allows the use of any arbitrary of nodes internal to the circuit or the circuit outputs...
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
Field programmable gate arrays (FPGAs) are getting more and more attractive for military and aerospace applications, among others devices. The usage of non volatile FPGAs, like Flash-based ones, reduces permanent radiation effects but transient faults are still a concern. In this paper we propose a new methodology for effectively measuring the width of radiation-induced transient faults thus allowing...
The purpose of TAFT fault tolerance studies conducted at CNES is to prepare the space community for the significant evolution linked to the usage of COTS components for developing spacecraft supercomputers. CNES has patented the DMT and DT2 fault-tolerant architectures with 'light' features. The development of a DMT/DT2 testbench based on a PowerPC7448 microprocessor from e2v is presented in this...
Complexity in industrial control systems has grown exponentially during the past decade. The reliability of such systems is dependant on trustable embedded controllers. The design of such embedded controllers is moving towards reliability-centric hardware/software co-design frameworks. This paper proposes a novel approach to the development of such embedded controllers, by proposing a special embedded...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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