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Nanowire MOSFETs have been recognized as one of the possible choices to continue the scaling of CMOS beyond conventional scaling limits. In present study we study various aspects of device characteristics and Mixedmode circuit behavior of Silicon and Germanium Nanowire MOSFETs. The various parameters determining the behavior of device in the analog/digital circuits is studied and compared for Nanowire...
In this work, we investigated effects of high pressure hydrogen annealing (HPHA) to improve the device performance of Si NW MOSFET devices with multi channels on SOI wafer using top down method which may be more compatible to CMOS process.
Silicon nanowire-based transistors were fabricated and tested for their radiation hardness by exposure to Co60 X-ray radiation at doses ranging from 50-250 kRad. Minor degradation of the transistor characteristics was observed at 250 kRad. Our results show the inherent radiation hardness of nanowire devices.
We report the fabrication and characterization of double-gated Si nanowire field effect transistors with excellent current-voltage characteristics, low subthreshold slope ~85 mV/dec and high on/off current ratio ~106. The Si nanowire devices are fabricated by using a self-aligned technique with standard photolithographic alignment and metal lift-off processes, enabling the large-scale integration...
Engineering materials at the nanoscale by combining controlled nanomaterial synthesis and directed assembly methods offers the potential to create new electronic and optical devices with improved performance and functionality. Semiconductor nanowires have been of particular interest as a model system for studying new physical phenomena arising from their scaled geometries as well as for applications...
InSb nanowire devices at different diameter range from 30 nm-200 nm using electrochemical deposition technique is demonstrated. Electrical properties of nanowires is investigated at different diameters for beyond CMOS applications with high speed and low power characteristics. In particular, InSb nanowire based FET devices is fabricated on Si substrate and presented.
Transconductance (gm) enhancement in n-type and p-type nanowire field-effect-transistors (nwFETs) is demonstrated by introducing controlled tensile strain into channel regions by pattern dependant oxidation (PADOX). Values of gm are enhanced relative to control devices by a factor of 1.5 in p-nwFETs and 3.0 in n-nwFETs. Strain distributions calculated by a three-dimensional molecular dynamics simulation...
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