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In this paper, patterned Cu and Si substrates are interconnected via solder alloys through Al/Ni self-propagating nano-film to obtain hermetical packaging for infrared detector. During the joining process, substrates which are coated with different solder layers (e.g. Sn and AuSn) are bonded under various atmospheres. By optimizing joining parameters, reliable metallurgical joints between Si/Cu and...
The copper (Cu) wire has become a new alternative of wires in advanced packaging technology. In this research, we selected large Cu wires to develop a new bonding process based on solid-state process. Upon thorough investigation, we chose silver (Ag) as the bonding medium between Cu wires and silicon (Si) chips, for its ductility and superior physical properties. The end of Cu wires is cut and polished...
Recently, three dimensional integration circuits technology has received much attention because of the demands of gradually increasing functionality and performance in microelectronic packaging for different types of electronic devices. For 3D chip stacking, high density interconnections are required in high-performance electronic products. Though the bumping process used could be either electroplating...
In this paper, 10μm Ag flip-chip interconnect joints by solid-state bonding was demonstrated between Si chips and Cu substrates. In experiments, an array of 125×125 Ag columns that had 10μm in diameter, 20μm in pitch and 10μm in height was fabricated in one chip region of Si wafers that were first metalized with Cr/Au. The process was performed using solid-state atomic bonding at 250°C with a static...
We performed 40μm silver (Ag)/gold (Au) composite flip-chip interconnects joints between silicon (Si) chips and copper (Cu) substrate using solid-state bonding process at 200°C. 50×50 Ag/Au columns with 40μm in diameter and 100μm pitch were fabricated on a chip region by photolithographic and electroplating processes. Then, the Ag/Au columns were bonding to Cu substrate with fresh surface using solid-state...
In new applications (such as MEMS, bio-MEMS), vertical integration requires a low processing temperature below 200°C to bond these devices without degrading their performance. Low temperature bonds are thin intermetallic compounds (IMCs) bonds that are formed between devices when plated layers of different metals on each side of the component come into contact under relatively low temperature and...
In this project, a novel solid-state bonding technique was developed to bond silicon (Si) chips to silver (Ag) layer plated on copper (Cu) substrates at temperature (260°C) far below Ag melting temperature of 961°C. This is possible because the gold (Au) layer coated on Si chip is made to contact the Ag atoms in atomic scale, thus allowing the Au atoms and Ag atoms to see each other and share electrons...
Direct bonding between large silicon (Si) chips and copper (Cu) substrates using pure silver (Ag) as bonding material has been successfully developed. The Si-Ag-Cu direct bonding process was performed in two assembly structures, die attachment and flip-chip interconnect, at low process temperature of 250degC. It is a typical reflow temperature of lead-free (Pb-free) solders. In die attachment structure,...
Electroless Ni-P plating is cost effective process to fabricate UBM for solder flip chip. Thickness of electroless Ni-P UBM is important factor for mechanical and electromigration reliability. Pb-free solder flip chips with different UBM thicknesses of 3, 5 and 10 mum were prepared. First, the effect of UBM thickness on mechanical reliability was investigated. Before underfilling, flip chips using...
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