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We report on the development of a metallic source and drain module for FDSOI pMOSFETs including lateral PtSi formation, Ti/TiN barrier, optimized doping conditions, controlled PtSi penetration below spacers and suitable cleaning of the PtSi surface prior to barrier deposition. Mean specific contact resistivity values lower than 2 Omega mum2 have been achieved, which leads to highly performant pMOSFET...
BEOL reliability becomes increasing important issues as device dimensions are scaled for the Cu/low-k interconnects, including electromigration (EM), stress migration (SM), inter-line leakage, breakdown and time-dependent dielectric breakdown (TDDB) characteristics of low-k dielectrics, and plasma-process induced damage (P2ID). This paper gives a summary of the BEOL reliability improvement for the...
Plasma-process induced damage (P2ID) is a serious yield and reliability concern with the continuous VLSI technical node shrinkage. In this paper, P2ID on 65 nm node VLSI manufacturing development is investigated. Plasma in high-density plasma deposition (HDP), preclean of physical vapor deposition (PVD) and reactive ion etching (RIE) processes have significant negative impact on P2ID. Respective improving...
Detection of killer defects is critical to improving yields in VLSI fabrication. Bright and dark-field inspection tools detect both killer and non-killer defects, and in some cases a high level of nuisance defects may adversely affect the ability to monitor and eliminate the real ones that have a detrimental impact on device yield. E-beam inspection tools take advantage of a phenomenon referred to...
Preclean is a critical process step in Cu metallization to ensure device reliability. For the integration of ultra low k (kles2.5) dielectrics, an advanced preclean (APC) technology has been developed and characterized using PECVD SiOCH (k=2.5) dielectrics. With the optimal hardware and process, this technology minimizes plasma damage, causing no measurable k increase and having the lowest impact...
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