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In this paper a 600MHz 4th order low-pass analog filter in CMOS-28nm is presented. The transfer function is obtained with the cascade of two Active-RC Rauch biquadratic cells. Each cell is based on a novel OPAMP optimized for very high frequency operation achieving a Unity Gain Bandwidth (UGBW) > 7GHz. The developed three stage folded OPAMP exploits a feed-forward compensation technique to maximize...
In various optical sensor applications, programmable analog filters are desirable to reduce the hardware requirement. Memristor is two state programmable nonvolatile resistor, which has a small size and low power consumption. Using these resistance switching characteristics of a memristor, we propose a novel memristor-capacitor (MC) based printed low pass and high pass filters for analog circuits...
This paper presents a configurable 1/2/3 order Butterworth low pass(LP)/complex bandpass (CBP) filter for sub-GHz Applications in a 180-nm CMOS process. The filter employs operational transconductance amplifier (OTA) unit with feedforward capacitor instead of conventional two-stage amplifiers to broaden bandwidth while consuming no extra power. In order to achieve a good noise figure, extra noise...
A programmable active-RC low-pass filter is presented with tunable bandwidth realized with a fast tuning circuit suited for a zero-IF transceiver. The filter adopts a 3rd-order Bessel low-pass architecture. Its −3dB bandwidth can be programmed to 250K, 500K, 1M and 2MHz.An operational amplifier with adaptive Miller compensation is designed to maintain the stability of the circuit when the filter is...
A 6th order fully differential CMOS active-RC inverse-Chebyshev low pass filter with zero capacitor spread is presented in this paper. It provides inverse-Chebyshev response with tunable cutoff frequency from 1MHz to 10MHz by regulating a resistor array. Transmission zero capacitors are replaced by resistors to eliminate the large capacitor spread also in order to reduce the area and mismatch. Modified...
A 4th order Chebyshev complex filter with stop band zeros at the DC point for low-IF receivers' applications using 0.18μm CMOS technology is proposed in this paper. Based on capacitor-OTA integrators, the designed ladder filter uses resistors instead of capacitors to realize the transmission zeros. The complex filter has a 0 to 48dB tunable gain (6dB per step) and over 65dB DC-offset rejection. A...
A 5th-order switched-capacitor (SC) complex filter is implemented in 0.2-??m CMOS technology. In order to reduce the die size and current consumption of the complex filter, a novel SC integrator is developed. The filter is centered at 24.8 kHz with bandwidth of 20.2 kHz. The Image channel is attenuated by more than 40 dB. The in-band 3rd order harmonic input intercept point (IIP3) is 15 dBm and the...
A continuous-time low pass filter (LPF) for high bandwidth application is presented in this paper. The LPF is realized with 6th order Chebyshev structure. Large dynamic range is achieved by adopting linearity enhanced technique. A 6-bit controlled switched-capacitor array is realized to get wide programmable cut-off frequency. The measurement results indicate that the -3 dB cut-off frequency can be...
We present in this paper the design of a 10 GHz bandwidth low noise active front end interface. This interface uses a common gate amplifier architecture co-designed with the carrier to die bonding wire transition. The carrier to die transition is used to build a low loss third order low pass filter which is used as input matching cell for the common gate amplifier. This Chip-Package interface allows...
A 3rd order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 ??m standard CMOS technology. The complex filter is centered at 4.092 MHz with bandwidth of 2.4 MHz. The in-band 3rd order harmonic input intercept point (IIP3) is larger than 16.2 dBm, with 50 ?? as the source impedance. The input referred noise is about 80 uVrms. The RC tuning...
A 3rd order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 ??m standard CMOS technology. The complex filter is centered at 4.092 MHz with bandwidth of 2.4 MHz. The in-band 3rd order harmonic input intercept point (IIP3) is larger than 19 dBm, with 50 ?? as the source impedance. The input referred noise is about 80 ??Vrms. The RC tuning...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
A high intercept points, cost-effective, and power-efficient switching FET double balanced mixer (DBM) is reported. The Switching FET DBM demonstrated in this work offers input intercept points (IIP3) and conversion loss typically 44 dBm and 8.5 dB respectively with 15 dBm LO power for the frequency band (RF: 900-2150 MHz, LO: 850-1950 MHz, IF: 50-200 MHz). The measured interport isolation is typically...
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