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We present a model of quantum transport for Si nanowire transistor that makes use of the Wigner function formalism and takes into account carrier scattering. Scattering effects on current-voltage (I–V) characteristics are assessed using both the relaxation time approximation and the Boltzmann collision operator. Within the Fermi golden rule approximation, the standard collision term is described for...
The surface roughness scattering in n-type FinFET devices is accurately analyzed based on mobility measurements at low temperatures. Using the top/side wall current separation technique, the effective mobility for each surface has been extracted. Considering the second order mobility degradation factor, the surface roughness scattering of top and sidewall conduction has been quantitatively compared.
We propose an approach to evaluate the effect on threshold voltage variability due to line edge roughness (LER) and to surface roughness (SR) fully based on analytical modeling or supported by a limited number of TCAD simulations to perform parameter sensitivity analysis. We show that in the case of a 32 nm ultra-thin-body SOI MOSFET and a 22 nm double-gate MOSFET our approach is capable to reproduce...
In this work we investigate the electron mobility in nanowire FETs operating under quasi-ballistic conditions. Starting from a general expression of the current-voltage characteristics worked out in a previous paper, we extract the drain current at vanishingly-low drain voltages and find the functional dependence of the effective mobility on the device length, the mean-free path and the barrier height...
We present numerical simulations of double-gate (DG)-MOSFETs based on a full-3D self-consistent Poisson-Schrodinger algorithm within the real-space non equilibrium Green's function (NEGF) approach. We include a geometrical description of surface roughness (SR) via an exponential auto-correlation law. In order to simulate rough planar structures we adopt periodic boundary conditions along one of the...
We address the transport properties of narrow gate-all-around silicon nanowires in the presence of surface-roughness (SR) scattering at the Si/SiO2 interface, considering nanowire transistors with a cross section of 3 times 3 nm2 and gate length of 15 nm. We present transfer characteristics and effective-mobility calculations based on a full 3-D real-space self-consistent Poisson-Schrodinger solver...
Low-field mobility in ultra-short nanotransistors is attracting large interest as strongly influenced by the role of quasi-ballistic carriers. Short-channel Silicon nanowire transistors (SiNWTs) are major candidates to work in this transport regime. Moreover, they are also expected to be strongly influenced by potential fluctuations arising from surface roughness (SR) at the Si-oxide interface. Here,...
We utilize a fully quantum mechanical transport simulator based on the Contact Block Reduction (CBR) method to investigate the influence of interface roughness in nanoscale FinFET devices. In this work we treat interface roughness by creating a random deviation at ideal Si/SiO2 interface in real space, and then solving quantum transport problem fully self-consistently with the gates for the resulting...
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