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This paper presents a new test protocol aimed at accurately determining the temperature of 3D electronic circuits as well as their heat distribution. It is based on AC electrical measurements coupled with InfraRed Lock-In Thermography (IR LIT) measurements. The circuit temperature is assessed thanks to AC resistance measurements and the Temperature Coefficient of Resistance (TCR) of metallic layers...
Passive RFID circuits depend on low voltage low power area-efficient current references. This work presents two current source implementations using 180 nm CMOS process. Both circuits work with a minimum supply voltage of 0.8 V and with a current consumption lower than 150 nA. The first one has a positive temperature coefficient while the second one is temperature compensated. Silicon results from...
The convergence and miniaturization of the consumer electronic products such as cell phones and digital cameras has led to the vertical integration of packages i.e., 3-D packaging. 3-D chip stacking is emerging as a powerful tool that satisfies such Integrated Circuit (IC) package requirements. 3-D technology is the trend for future electronics, especially hand-held, hence, making it an important...
We have investigated the destruction mechanism of High Voltage (HV) Free Wheeling Diodes (FWD) during a reverse recovery operation. The most possible mode of the destruction phenomena originate in local heating due to current filament at the edge portion of the active area. To achieve a large reverse recovery Safe Operation Area (SOA), we focus on the boundary region between the active area and the...
For photovoltaic applications, the knowledge about system behaviour in real operating conditions is desirable. Presented paper describes the dependences of all important parameters of crystalline silicon (c-Si) cell and CIS photovoltaic mini-module on both temperature and irradiance obtained using cell tester Pasan IIc.
IC performance is now predominantly governed by interconnects delay due to smaller wire cross-section, wire pitch and longer lines that traverse across larger chips. These increase the resistance and capacitance hence signal latency of these lines. Material solutions such as Cu/low-kappa is no longer able to reduce interconnects delay time as pitch is scaled down further. 3-D ICs with multiple active...
As device-scaling challenges increase, three-dimensional (3D) integrated circuits (ICs) are receiving more attention for system performance enhancements, due to their higher interconnect densities and shorter interconnect lengths. However, because of the limited contact area and the higher circuit density, the cooling of 3D ICs is more challenging. In order to assess appropriate cooling solutions...
This paper presents a complete gas-sensing chip. It consists of a high-efficiency temperature control loop with a switching power stage and digital set-point and of a wide-dynamic-range interface circuit able to operate without calibration. Measurements results show that the controlled temperature of the sensor over a range of 250degC exhibits an accuracy better than 1.5degC with a maximum peak-to-peak...
The dramatic increase in leakage current, coupled with the swell in process variability in nano-scaled CMOS technologies, has become a major issue for future IC design. Moreover, due to the spread of leakage power values, leakage variability cannot be neglected anymore. In this work an accurate analytic estimation and modeling methodology has been developed for logic gates leakage under statistical...
ldquoDevelopment for advanced thermoelectric conversion systemsrdquo supported by the new energy and industrial technology development organization (NEDO) has been successfully completed as one of the Japanese national energy conservation projects. Three types of the cascaded thermoelectric modules operating up to 850 K in high electrode temperature and two types of Bi-Te thermoelectric modules operating...
The polycrystalline samples of BaSi2, SrSi2, and LaSi were prepared by spark plasma sintering (SPS). The electrical resistivity (rho) and Seebeck coefficient (S) were measured above room temperature. The S of BaSi2 was negative and the absolute values were rather high (-669 muVK-1 at 337 K). The S of SrSi2 was positive and the absolute values were lower (118 muVK-1 at 332 K) than those of BaSi2. For...
Cooling is important to keep the temperatures of the highly integrated silicon electronic devices and power devices e.g. power MOSFET, IGBT. Yamaguchi et al. have proposed a new scheme to cool down the devices by its own current named ldquoself-cooling devicerdquo, in which the cooling process uses Peltier effect. In the proposed scheme, we should use the materials that have high thermal conductivity,...
The present work aims at studying the cooling performance of a thermoelectric device that integrated with integrated heat spreader (IHS) on a flip-chip plastic ball grid array (FC-PBGA) package. The new thermoelectric device herein is fabricated on the metal substrates by flip-chip assembly process. Thermal performance of the new package was comprehensive studied. The thermal resistances of IHS with/without...
In this study, we fabricated in-plane thermoelectric micro-generators (4 mm times 4 mm) based on bismuth telluride thin films by using flash evaporation method. The thermoelectric properties of as-grown thin films are lower than those of bulk materials. Therefore the as-grown thin films were annealed in hydrogen at atmospheric pressure for 1 hour in a temperature range of 200 degC. to 400degC. By...
Nanostructuring is one of the effective approaches to lower the thermal conductivity of materials. Nanostructured skutterudite-related compounds CoSb3, Fe0.5Ni0.5Sb3, Fe0.25Ni0.25Co0.5Sb3 and Te-doped CoSb3 were synthesized by a solvothermal route. The bulk materials were prepared by hot pressing or spark plasma sintering from the solvothermally synthesized nanopowders. The thermal conductivity values...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
ZnO:Al/n-Si heterojunction solar cells were made by rf magnetron sputtering. Their interfacial structure was analysed by transmission electron microscopy (TEM). These TEM studies reveal the existence of a non-intentionally grown tunnel oxide layer between the Si wafer and the ZnO:Al film, and thus the devices are actually of the type SIS. The current transport properties of the heterojunction are...
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