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With the development of computer network, traditional general CPU and ASIC cannot meet the corresponding needs due to their disadvantages, nevertheless, the Network Processor(NP) finds its wide application in today's network devices because of its great balance between performance and flexibility. This paper focuses on the issues of system design and implementation of NPs. The early design method...
In this paper, we present a software approach for localization of faulty components in a 2D-mesh Network-on-Chip, targeting fault tolerance in a shared memory MP2SoC architecture. We use a pre-existing and distributed hardware infrastructure supporting self-test and de-activation of the faulty components (routers and communication channels), that are transformed into “black hole”. We detail the software...
One of most popular algorithms for finding a path between any two pins on a planar graph is Lee's algorithm. In this paper, three different approaches are proposed and investigated for accelerating Lee's algorithm. The first approach is based on a hardware/software co-design strategy, while the second is a custom hardware implementation using Handel-C. An application specific instruction implementation...
The advance in FPGA technology allowed embedding different types of resources on a single chip. These resources range from a simple look-up table to a complete processor. The resources available on the FPGA fabric allow building various hardware systems for different applications with several trade-offs in terms of performance and power consumption. This paper proposes six different architectures...
In todays and future automotive electric/electronic architectures the central gateway is one of the key components. The introduction of high performance bus systems like FlexRay and Ethernet, as well as new applications, creates additional requirements for gateway systems. The usage of reconfigurable hardware gives an interesting alternative to existing microcontroller based solutions. A modular gateway...
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