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By inserting a simple cell formed by a capacitor and diode into quadratic boost structures, new converters are obtained. They feature: a larger dc gain compared with that of quadratic boost converters and a smaller voltage stress on the switch and output diode, non-pulsating input current, as required for the use in conjunction with the environmental-friendly energy cells, easiness of the transistor...
A step-up DC-DC converter is proposed by inserting a new switched-capacitor cell in a modified PWM boost circuit. The obtained hybrid PWM non-isolated converter is able to provide a large DC gain, as necessary for serving as front-end to electrical grids supplied by solar or fuel cells. It features low voltage stress on the switches compared with traditional boost converter, allowing for the use of...
In this paper, splitting of peak switch voltage by series connected transistors in the class E inverter is proposed. In this method, peak switch voltage of class E inverter is reduced to half of conventional because shunt capacitor voltage is divided by two switches. Key feature of this method is that drive signal source of each switch can be grounded. Namely, transformer is not required in this method...
Two switched-inductor cells are proposed. One of them is integrated into a boost structure, and the other one in a buck structure to get novel step-up, respectively step-down non-isolated converters with a large dc gain. The converters are operated at a high switching frequency, allowing for the inductors to be printed in PCB. Small size and high power density is obtained. The experimental results...
The trend to increase the number of cores integrated on a single die makes Networks-on-Chip (NoCs) a key component from the interconnection viewpoint. Unfortunately, continuous scaling of CMOS technology poses severe concerns regarding failure mechanisms, such as NBTI, that are crucial in achieving a reasonable component lifetime. Furthermore, the leakage power became more and more a critical issues...
A valid resistive dielectric film with excellent state switching is successfully demonstrated in a contact resistive RAM (CR-RAM) structure fabricated by 90-nm CMOS logic technology. This unique CR-RAM cell is realized by placing the RRAM material on top of the N+ silicon with a very small resistive switching area limited by the source line contact. In addition, the set and reset current of the new...
3D contactless technology based on capacitive coupling represents a promising solution for high-speed and low power signaling in vertically integrated chips. AC coupled interconnects do not suffer from mechanical stress, and the parasitic load is much reduced when compared to standard DC solutions, such as wire bonding and micro bumps. Communication system based on wireless interconnection scheme...
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