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This paper investigates the use of stacked depletion-mode n-channel MOSFET (D-MOS) for RF switch applications. Compared to the commonly used enhancement-mode MOSFET (E-MOS), the D-MOS transistor offers a significant reduction in on-state resistance (RON) and off-state capacitance (COFF) simultaneously and an excellent figure of merit (RonX Coff) of 134fs (roughly 3X improvement) can be achieved. With...
Adder circuit is one of the basic building block of digital data processing circuits. Performance of a digital processing system can be improved by designing high performance adder circuit. Replacing the conventional Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology by hybrid approach of Single Electron Transistor (SET) and MOSFET technology will enhance the overall performance...
This paper discusses techniques, limitations and possible future developments of circuits based on transistors operated in the weak inversion (w.i.) mode, also called sub-threshold mode. In analog circuits, w.i. is reached at very low current, but it is also needed for very low supply voltage. Its exponential behaviour can be exploited in special circuits schemes, some of them devised for bipolar...
We investigate the modeling of gate oxide shorts (GOS) in MOSFETs. We target channel-gate oxide shorts defects which are common shorts in today's MOSFETs and will become prevalent in future CMOS technologies. The proposed model for a defective MOSFET augments the defect-free model with three current sources. We test the validity of our model using HSPICE simulations, which show a good match in the...
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