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Ring oscillator is versatile devise based on CMOS designed for temperature sensor to replace the conventional temperature sensor for optimized the application specific circuits which are vulnerable in temperature variations. Sensors like RTD, Thermocouple, Therimoristor and IC are often used within electronic systems to monitor temperature and provide protection from excessive temperature excursions...
An ultra low quiescent current voltage reference generator with a supply voltage ranging from 1.5V to 3.3V has been implemented in 0.35um process. It is a full CMOS voltage reference which doesn't need bipolar devices and resistors. The quiescent current is only 280nA in normal operation and the temperature coefficient is 87ppm/°C from −25°C to 85°C. Its power supply rejection ratio without any filtering...
This paper presents a MOS translinear principle based current mode CMOS four-quadrant multiplier. The multiplication is implemented by two MOS translinear loops working in the subthreshold region. The remainder of the differential output currents is the multiplication of the signals carried by the differential input currents. The multiplier characterized with a high bandwidth and low power consumption...
We propose the concept of AC-coupled LC tank for minimizing VCO pushing, as well as to enable multi-terminal tuning of the varactors, in the widely used cross-coupled CMOS VCOs. The proposed concept is demonstrated with a mmWave VCO (40GHz) in a foundry-based 65nm bulk CMOS. Measured data demonstrates >3× lower pushing while achieving 16% wider tuning range (7.2GHz versus 6.1GHz) compared to a...
This paper presents an ultra low power, low voltage, high gain squarer circuit for use in non-coherent impulse radio ultra wideband (IR-UWB) receivers. The proposed squaring function is implemented based on the intrinsic CMOS transistor characteristics in the sub-threshold region, where the second-order derivative of the drain current is maximized. Additionally, a capacitor cross-coupling gm boosting...
This paper presents a new true RMS-to-DC converter based on a square-root-domain squarer/divider. The circuit employs MOSFETs that operate in strong inverted saturation region performing electronically simulated translinear loop. The converter features low fabrication cost, immune from body effect, two-quadrant input current. The RMS-to-DC Converter circuits are realized using TSMC 0.35µm CMOS technology.
This work proposes the Novel design of a CMOS Voltage Divider based Current Mirror that is suitable for Low current biasing applications. The input/output characteristics of the proposed current mirror are discussed. Designed circuit is simulated in a proprietary 180 nm CMOS process, using Cadence Spectre and UMC models. Based on simulation and test results of the newly proposed design, the minimal...
A power-minimized LC voltage controlled oscillator (VCO) with switched biasing and triode-region MOSFETs has been designed using a 0.18-µm CMOS process. The design strategy for an LC VCO suggested an inductance selection scheme to accommodate the trade-off between power consumption and phase noise. Consuming a current of 680-µA from a 1.2 V power supply, the VCO achieves a measured single-sideband...
In this paper, a new fully CMOS four-quadrant multiplier based on plus-type second-generation current conveyors (CCII+s) is presented. The proposed circuit employs only two CCII+s and two NMOS transistors as active devices, without the need for any external passive elements. Functionality of the new circuit is demonstrated through SPICE simulations performed using 0.25μm CMOS process technology parameters...
A three op-amp active resistance instrumentation amplifier (I.A) with high gain and dc suppression is presented for biomedical applications. High gain is achieved by careful selection of aspect ratio of op-amps and by efficient design of passive resistances by active MOS transistors. DC suppression is achieved by offset cancellation circuit at the output of I.A. This offset cancellation circuit is...
This paper describes the modeling and design considerations of a low-power divide-by-two injection-locked frequency divider (ILFD) for 60GHz frequency synthesizer applications implemented in 90nm CMOS process. The paper proposes a divider's locking range model based on mixing analysis. The design uses a capacitor bank for the divider band selection and tail current injection. Measured results of the...
This paper describes a CMOS implementation of a Linear Voltage Regulator (LVR) used to power implanted systems. The topology is based on a classical structure of a Low Dropout Regulator (LDO) and receives his activation energy from a RF link characterizing a passive RFID tag. The LVR was designed to achieve important features like low power consumption, and a small silicon area without the need for...
This work presents the implementation of a CMOS Linear Voltage Regulator (LVR) used to power up bio-implanted systems. The topology is based on a classical structure of a Low Dropout Regulator (LDO) and receives his activation energy from a RF link characterizing a passive RFID tag. The LVR was designed to achieve important features like low power consumption, and a small silicon area without the...
An improved negative level shifter with high speed and low power consumption is presented. To reduce the switching delay and power consumption, a boost circuit is designed and additional charging current paths are introduced in the improved level shifter. The circuit has been designed in 130nm triple-well standard CMOS technology with a nominal power supply VDD of 1.5V and a negative voltage of -4...
A low-power complementary metal oxide semiconductor(CMOS) operational amplifier(op-amp) is proposed for real-time signal processing system of microsensor. This proposed implementation was based on traditional folded cascode op-amp architecture with positive channel metal oxide semiconductor (PMOS) differential input transistors, which is the best choice for lower-power applications. Simultaneously...
A low-power complementary metal oxide semiconductor (CMOS) bandgap current reference is proposed under the 1.8V supply voltage. The temperature compensation current generator was used in order to obtain an accurate 5μA current with lower temperature coefficient. Sub-threshold technology and advanced startup circuit were adopted to decrease the circuit power consumption. The current reference has been...
In this paper, a new low voltage topology for analog multiplier is presented. The circuit can be used with single low-power supply. The complete circuit has only twelve transistors; therefore, it satisfies the need for compact sub-circuit in analog VLSI systems. The mathematical discussion on the power consumption, total harmonic distortion and other features of the circuit and also simulation results...
A novel low-power and high-performance Standard Ternary Inverter (STI) for CMOS technology is proposed in this paper. This inverter could be used as a fundamental block for designing other ternary basic logic gates. This circuit consists of only MOS transistors and capacitors without any area consuming resistors in its structure. Another great advantage of this design in comparison with the other...
The demands of future computing have led to challenges of very deep submicron (DSM) regime. As a result, leakage power dissipation is rapidly becoming a substantial contributor to the total power dissipation as threshold voltage becomes small, according to the International Technology Roadmap for Semiconductors (ITRS). In this paper a new low leakage power technique, named “MTSCStack” has been proposed...
This paper propose a 1-bit low-power full adder that is designed by taking the advantage of the concept of pass-transistor logic and the concept of dual-threshold domino logic. The concept of pass-transistor logic is used to design the circuit generating the sum signal such that the number of transistors can be reduced. The concept of dual-threshold domino logic is adapted to design the circuit generating...
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