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Energy efficiency and idle power consumption are becoming important parameters in the design of embedded systems that are realized with nanometer-scale CMOS devices. In nanometer-scale CMOS, Excessive quiescent power dissipation can lead to excessive heat generation and reliability issues. To address energy efficiency and idle power consumption, we present a novel Complementary Nano-Electro-Mechanical...
The Wave Dynamic Differential Logic (WDDL) has been identified as a promising countermeasure to increase the robustness of cryptographic devices against Differential Power Attacks (DPA). However, to guarantee the effectiveness of WDDL technique, the routing in both the direct and complementary paths must be balanced. This paper tackles the problem of unbalance of dual-rail signals in WDDL design....
Simultaneous switching noise (SSN) and its behavior have recently become more and more critical in IC and other highspeed system designs [1][2]. This is attributed to ever-increasing speed, frequency, density, and power, as well as decreasing circuit dimensions and logic levels. The difference in a few mill volts may cause the system to fail. Therefore, it is very important to understand the characteristics...
In this paper, a kind of pseudo Gray code presentation of test patterns based on accumulation generators is presented and a low power test scheme is proposed to test computational function modules with contiguous subspace in VLSI, especially in DSP. If test patterns from accumulators for the modules are encoded in the pseudo Gray code presentation, the switching activities of the modules are reduced,...
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