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Today's cyber-physical systems (CPS) for the emerging Smart cities includes hardware and software with intelligent sensing and controls. In Smart cities, the use of high definition images, videos, and context information has become a requirement for urban street data collection and processing. Field Programmable Gate Array enabled data centers and processing shows the great potential for its high...
Time-of-Flight 3D imaging, using the indirect measuring method that employs photonic mixing devices, increases in popularity. This is due to the recent availability of accurate and miniaturized Time-of-Flight cameras that can be integrated into small embedded devices. However, providing a system comprising a camera and hardware-accelerated processing, which is useable for various application types...
The design of the system in this paper is based on ARM and FPGA platform, we use two CMOS cameras, collect image data in two directions (X direction and Y direction) vertically of the optical fiber, so ARM can obtain three-dimensional fiber welding image. The optical fiber image of two CMOS cameras is processed by ARM, is displayed in parallel by display device. The design of the new system can improve...
Real-time Stereo vision is an immerging technique inspired from human visual system that computes the disparity between correspondence points in multiple images captured from corresponding camera. High resolution images are necessary to provide good quality auto stereoscopic displays which can be used to produce stereo without the need of 3-D glasses. The aim of this paper is to calculate the disparity...
This paper describes part of project that implemented the image processing of a CMOS sensor for endoscopic purposes. The sensor is a small sized device of 1×1mm2 and the image processing has been done inside a FPGA. This part of the work describes the implementation of the Gamma function with a balance between the resources needed and the accuracy. A linear piecewise solution was used that stores...
This live demonstration shows an FPGA-based real-time hand sign recognition system. The system consists of a feature vector extraction and a vector classifier. The SOM-Hebb classifier network is used for the classification network, which is made of a self-organizing map and a feed-forward neural network. Training of the SOM-Hebb classifier is carried out by an off-chip computer. In this demonstration,...
Due to gesture recognition, smart TVs that are controlled by simple motions have been steadily developed and improved. Important problems, however, remain unresolved. In comparison to low-price remote controllers, it is difficult to achieve competitive prices and performances for diverse and complex gesture-recognition systems with the use of costly 3D motion sensors. This study therefore aims to...
In this paper a system for real-time structure from motion computation is presented. The module is dedicated for a video based Advanced Driver Assistance System, where information about the surrounding environment and scene depth is often required to facilitate advanced applications. A heterogeneous System on a Chip solution, based on a FPGA device and an ARM processor is presented. The described...
The recent development of high-quality free viewpoint synthesis algorithms and their implementations allows to realize glasses-free 3D perception. Although many algorithms have been developed in this domain, the real-time hardware realization of a free viewpoint synthesis for real-world images is challenging due to its high computational load and memory bandwidth requirements. In this paper, the first...
This paper proposes a hardware-oriented trinocular adaptive window size disparity estimation (T-AWDE) algorithm and the first real-time trinocular disparity estimation (DE) hardware that targets high-resolution images with high-quality disparity results. The proposed trinocular DE hardware is the enhanced version of the recently published binocular AWDE implementation. The T-AWDE hardware generates...
With the advancements in the hardware technology, it is now possible to transmit data over Ethernet at the rate of 100Mbps/1Gbps. The only limiting factor for such a high peed data transfer is the speed of the processor in the computer which does all the TCP/IP processing by using the TCP/IP software written in it. In the present system, the IR sensor used is taking 50 images of plasma per second...
We present a hardware architecture for real-time digital video stabilization in high-performance embedded systems. The stabilization algorithm analyzes the current and past video frames and obtains a motion estimation vector, which is then filtered to isolate unwanted camera movements from intentional panning. The vector is then used to correct the output video frame. We designed a hardware architecture...
This paper realizes a SoPC system which balances an electric unicycle based on image data from a CMOS camera. Generally, tilt-meters and gyros have commonly been chosen to measure the tilt angle and angle rate of a unicycle. In this paper, a CMOS camera is employed as the tilt angle measurement sensor instead. Through simple image processing techniques, a hardware circuit module for inclination measurement...
This paper describes the design of a hardware based system to locate and measure the pupil size using FPGA. The system was implemented in a Cyclone 4E EP4CE115F29C7, from Altera. The component has 114,480 logic elements, although only 8% of the component was used. To detect the pupil the system uses the Greedy Snakes Algorithm at 50 MHz input clock. The system was tested on a video with 30 fps, however,...
This paper presents a real-time trinocular disparity processor. The core module performs a pairwise segmented window matching for both the center-right and center-left image pair as their scaled down image pairs. The resulting cost functions are combined which results into nine different curves. A hierarchical classifier is presented which selects the most promising disparity value using information...
In this paper we present a real-time skin region detection method for high resolution video on embedded platforms. In the implementation, the region of interest is detected using two algorithms, running in parallel. One algorithm eliminates the background and the other one, detects the skin color patches in the image. To allow images to be processed rapidly on hardware, several techniques were employed...
With the development of display hardware, computing power, transmission and rendering algorithm, 3DTV is becoming the most promising technology that provides the users a more natural viewing experience than 2D displays. But most 3D movies need to wear 3D glasses to watch. Naked eye 3D is the ultimate goal of the development of 3D technology. Multi-view rendering by depth image based rendering (DIBR)...
Video surveillance systems are becoming very common nowadays. Cameras installed in many places are exposed to sabotage or tampering. This can be done by covering the camera lens, changing the focus of the camera lens or changing the camera position to prevent proper registration of the surveilled area. This paper describes a hardware implementation of a system that can detect these kind of events...
In this paper, a low-complexity image compression scheme for energy-constrained Wireless Camera Sensor Networks (WCSN) is presented and its hardware implementation cost for FPGA solution is evaluated. The main purpose of this FPGA circuit is to relieve the main microcontroller in the camera sensor node of the image compression tasks and to achieve highspeed and low-power image processing. The interest...
This paper shows a PID (Proportional, Integral, Derivative) controller, implemented in a reconfigurable hardware, to control the gain of a CMOS image sensor. The main functions of the proposed system are: image acquisition, histogram building, histogram analysis, and PID gain control based on the histogram analysis. The system has several functional modules working in parallel in order to achieve...
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