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A large and sudden current called surge current is always induced due to the momentary supply current through a low resistance path to ground when filed programmable gate array (FPGA) power on. This surge current will request the power supply of FPGA to source more current to meet this instantaneous demand or complicate the power management system of FPGA in order to succeed in powering up FPGA. Therefore,...
An advantage of a RLD (Reconfigurable logic device) such as an FPGA (Field programmable gate array) is that it can be customized after being manufactured. However, there is a problem related to standby power when using SRAM as a configuration memory. Power gating, which is one of the power reduction techniques, is difficult to use in SRAM-based RLDs because of the high overhead - data hibernation...
Radiation effects on SRAM-based FPGA configuration memory induce unique failure modes that cannot be found in similar ASIC devices and can translate into permanent errors in the circuit mapped into the FPGA. The physical layout of the mapped circuit has a considerable impact on the overall reliability of the implemented circuit. In this work we present a set of soft error reliability aware placement...
An advantage of a RLD (Reconfigurable logic device) such as an FPGA (Field programmable gate array) is that it can be customized after being manufactured. However, there is a problem related to standby power when using it in SoC used in embedded systems. Power gating, which is one of the power reduction techniques, is difficult to use in SRAM-based RLDs because of the high overhead - data hibernation...
World's first monolithically integrated Thin-Film-Transistor (TFT) SRAM configuration circuits over 90nm 9 layers of Cu interconnect CMOS is successfully fabricated at 300mm LSI mass production line for 3-dimensional Field Programmable Gate Arrays (3D-FPGA). This novel technology built over the 9th layer of Cu metal features aggressively scaled amorphous Si TFT having 180nm transistor gate length,...
Various algorithms and testing schemes have been developed in the past for testing memories for the presence of faults. Due to the increasing popularity of FPGAs, some schemes have specifically been developed for testing memories in these devices. FPGAs, when used in airborne space applications, are exposed to radiations which can produce faults within their memory. Faults may also develop during...
Leakage power dissipation is becoming a concern in field-programmable gate arrays (FPGAs) due to scaling in FPGA technology. Widely available commercial FPGAs are based on lookup tables (LUTs) consisting of SRAM arrays and multiplexers. In this paper, we analyze the leakage power dissipation in the SRAM-array of a FPGA LUT for a 65 nm CMOS process. We apply power-gating to an FPGA LUT SRAM array in...
This work intends to help designers assess and mitigate radiation effects in systems that use SRAM-based FPGAs. Several methodologies combining experimental procedure, mitigation strategies and technical aspects are discussed.
This paper presents principles and results of dynamic testing of an SRAM-based FPGA using time- resolved fault injection with a pulsed laser. The synchronization setup and experimental procedure are detailed. Fault injection results obtained with a DES crypto-core application implemented on a Xilinx Virtex II are discussed.
In this paper, the world's first hardware design of the motion vector processor of H.264/AVC and its FPGA implementation are presented. It aims at a low-cost high-throughput design for HD1080 (1920 times 1088) at 60 frames per second (fps) in High Profile (HP) H.264/AVC codec with Level 4.2. For this, deterministic processing loops control scheme and a novel 4 times 4 processing order substituting...
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