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Shared memory is a critical issue for large distributed systems. Despite several data coherency protocols have been proposed, the selection of the protocol that best suits to the application requirements and system constraints remains a challenge. The development of multi-coherency systems, where different protocols can be deployed during runtime, appears to be an interesting alternative. In order...
For many embedded systems, data protection is becoming a major issue. On those systems, processors are often heterogeneous and prevent from deploying a common, trusted hypervisor on all of them. Multiple native software stacks are thus bound to share the resources without protection between them. NoC-MPU is a Memory Protection Unit allowing to support the secure and flexible co-hosting of multiple...
The use of dynamically and partially reconfigurable resources permits to support complex applications. If dynamic and partial reconfiguration offers new possibilities for applicative implementations, it could also provide new ways to design efficient interconnection architectures. In this way, R2NoC, a Network on Chip constituted of dynamically reconfigurable routers is presented. First characterizations...
Embedded high performance computing applications, like for example image processing in surveillance systems, are very compute intensive due to the complexity of the algorithms. Additionally to the computing intensive data processing, the power consumption for such systems needs to be minimized in order to keep them lightweight and mobile operational. One solution for achieving these goals is to exploit...
While the computational core is becoming faster and faster, the communication efficiency between the processors has become a bottleneck which limits the performance of multiprocessor system-on-chip (MPSoC). This paper focuses on design and implementation of AXI bus protocol-based MPSoC architecture. Firstly, the RTL models of 4 NIOS II processors using AXI communication architecture are developed...
Multi-processor systems-on-chip (MPSoCs) are increasingly popular in embedded systems. Due to their complexity and huge design space to explore for such systems, CAD tools and frameworks to customize MPSoCs are mandatory. Some academic and industrial frameworks are available to support bus-based MPSoCs, but few works target NoCs as underlying communication architecture. A framework targeting MPSoC...
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