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Organizations need process data in real time. Cloud Computing is a common choice but it presents high latency on data transfer. As an alternative to reduces the latency, Edge computing based on System-on-a-Chip systems (SoC-based systems) can retain part of the data processing, allowing resource sharing among multiple requests through the use of OS-level virtualization. In this work, we analyze the...
This paper presents and characterizes the Princeton Application Repository for Shared-Memory Computers (PARSEC), a benchmark suite for studies of Chip-Multiprocessors (CMPs). Previous available benchmarks for multiprocessors have focused on high-performance computing applications and used a limited number of synchronization methods. PARSEC includes emerging applications in recognition, mining and...
We consider a notion of computer capacity as a novel approach to evaluation of computer performance. Computer capacity is based on the number of different tasks that can be executed in a given time. This characteristic does not depend on any particular task and is determined only by the computer architecture. It can be easily computed at the design stage and used for optimizing architectural decisions.
The continued increase in microprocessor clock frequency that has come from advancements in fabrication technology and reductions in feature size, creates challenges in maintaining both manufacturing yield rates and long-term reliability of devices. Methods based on defect detection and reduction may not offer a scalable solution due to cost of eliminating contaminants in the manufacturing process...
The authors have published earlier a novel technique for the supervised training of feed-forward artificial neural networks using the Harmony Search algorithm. This paper proposes a parallel and distributed implementation method to speedup the execution time to address the training of larger pattern-classification benchmarking problems. The proposed method is a hybrid technique that adopts form the...
Sustained performance is the amount of useful work a system can produce in a given amount of time on a regular basis. How much useful work a system can achieve is difficult to assess in a simple, general manner because different communities have their own views of what useful work means and because a large number of system characteristics influence its usefulness. Yet, we, as a community, intuitively,...
Many new designs for Decimal Floating Point (DFP) hardware units have been proposed in the last few years. To date, only the IBM POWER6 and POWER7 processors include internal units for decimal floating point processing. We have designed and tested several DFP units including an adder, multiplier, divider, square root, and fused-multiply-add compliant with the IEEE 754-2008 standard. This paper presents...
An approach of designing a simulation environment for the on-line monitoring of a fault tolerant flight control computer is presented in this paper. The simulation environment is designed to evaluate an improved on-line monitoring technique for processors with a built-in cache. This technique assumes that a monitor checks on-line whether the execution of a program is in accordance with the control...
This paper presents an innovative way to build flexible benchmarks based on micro-architecture independent characteristics. The proposed approach enables the testing and stressing of processors in order to reflect the real nature of applications and give meaningful information to the designers. The use of a limited number of basic blocks hand-coded in assembly, wisely chosen and arranged, enables...
This paper presents a work in progress that aims to reduce the overall training and processing time of feed-forward multi-layer neural networks. If the network is large processing is expensive in terms of both; time and space. In this paper, we suggest a cost-effective and presumably a faster processing technique by utilizing a heterogeneous distributed system composed of a set of commodity computers...
We study non-optimal LRU decisions (NODs) in single processors. We study how NOD frequency changes from one application to another and from one phase to another within an application. Moreover we introduce Hasty and Predictable blocks as more inclusive extensions of previously suggested classifications. We discuss implementation issues and present dynamic techniques to identify NODs. We study NOD...
The p-median problem is one of choosing p facilities from a set of candidates to satisfy the demands of n clients such that the overall cost is minimised. In this paper, PBS, a population based hybrid search algorithm for the p-median problem is introduced. The PBS algorithm uses a genetic algorithm based meta-heuristic, primarily based on cut and paste crossover operators, to generate new starting...
Motivated by excessively high benchmarking efforts caused by rapidly expanding design space and prevailing practices based on ad-hoc and subjective schemes, this paper seeks to improve simulation efficiency by proposing a novel methodology that combines two statistical analyses and one quantitative heuristic capable of subsetting a given benchmark suite based on the targeted processor configuration...
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