The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
We investigate the properties of ballistic spin field-effect transistors (SpinFETs). First we show that the amplitude of the tunneling magnetoresistance oscillations decreases dramatically with increasing temperature in SpinFETs with the semiconductor channel made of InAs. We also demonstrate that the [100] orientation of the silicon fin is preferred for practical realizations of silicon SpinFETs...
We have developed a ballistic self-consistent code which couples the six-band k.p Hamiltonian to the Green function formalism. We investigate the influence of channel material (Si, Ge, SiGe and GaAs), crystallographic orientation ([100] and [110]) and strain (biaxial and uniaxial) on the ultimate double-gate pMOSFET performances. The results show that the best configuration is obtained with strained...
The seamless integration of AlGaN/GaN transistors and Si CMOS electronics on the same chip will revolutionize digital and mixed signal electronics. In this talk we describe our group's effort on demonstrating this integration. Si-GaN-Si virtual substrates have been recently fabricated through substrate removal and wafer bonding processes. The very high thermal stability of nitrides allows for the...
We report the first demonstration of a surface channel inversion-type In0.53Ga0.47As n-MOSFET featuring gold-free palladium-germanium (PdGe) ohmic contacts and self-aligned S/D formed by silicon and phosphorus co-implantation. A gate stack comprising TaN/HfAlO/In0.53Ga0.47As is also featured. Excellent transistor output characteristics with high drain current on/off ratio of 104, high peak electron...
Prospects of velocity enhancement as the main driver of performance scaling in future CMOS are examined. Limits of velocity enhancement in uniaxially strained Si are first presented and then outlooks of novel channel materials such as Ge and III-V semiconductors are discussed. Finally, characteristics of performance scaling under power dissipation constraints are studied.
The prospect for the introduction of III-V semiconductors into the channel of n-type MOSFETs and thus replace Si with a high mobility material for 22 nm technology generation and beyond is examined in detail. The so-called implantfree (IF) III-V MOSFET architecture option is presented showing a fabricated n-type IF demonstrator suitable for scaling. We then focus on a prediction of the potential performance...
This paper presents simulations on tunnel field-effect transistors (TFET) and comparisons carefully to assess their impact at the same supply voltage. Current-voltage characteristics are simulated for n and p TFETs with different channel materials:Si,Ge,InGaAs, and InAs. Results show that InAs has the highest current for its smallest bandgap and effective mass, but it can not meet the off-state leakage...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.