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This paper presents a seven level inverter utilizing switched-capacitor technique. Proposed topology employs two asymmetric DC voltage sources as input and generates a multilevel staircase output. The structure includes a front-end switched-capacitor based DC-DC converter cascaded by a back-end H-bridge inverter. The frontend SC DC-DC converter feeds three DC voltage levels to the H-bridge inverter...
A new family of hybrid stacked power amplifiers (named as ‘Class-K’) are presented where each of the series stacked transistors can operate independently as different class of switching amplifiers. The voltage and current waveforms of the stacked transistors are shaped by independent harmonic load networks connected to the collector nodes of each of the stacked HBTs. A properly-designed Class-K amplifier...
This paper presents a 14-bit 2.5 GS/s current-steering digital-to-analog converter (DAC) in 65 nm CMOS. Small transistors are utilized in this design to reduce the 3rd-order harmonic distortion caused by finite output impedance. However, the adoption of small transistors increases the 2nd-order harmonic distortion and degrades the spurious-free dynamic range (SFDR). Hence a digital pre-distortion...
The design and simulation of a Class-E power amplifier with an Inverse Class-B driver are presented. The Inverse Class-B amplifier generates a train of half sinusoids which provides a compromise between using a sine wave and a square wave as the input waveform. The design methodology proposed includes the use of load-pull technique to determine the optimum fundamental-frequency load-impedance of the...
The paper presents the ways of improving output voltage spectrum in switched-mode generators. Because of errors arising while setting the transistors' switching times, it is rather difficult to achieve the required compensation of higher harmonics. Switching times errors are caused by the inertia of the switching process in power transistors as well as sampling errors of control devices. Analysis...
Model-based control of converter-connected assets is an option to establish excellent dynamics. Such a control strongly relies on the quality of the model used. In case of power-electronic converters, blanking-time effects introduces a large voltage error, especially at low output voltage. Blanking-time effects depend on the sign (and, to a lesser degree, on the magnitude) of the current flowing in...
New design principle and power circuit structure for the step-up direct current power supply system based on the resonance structures with switching capacitors is considered. The system has high efficiency factor (EF), low harmonics coefficient of input and output current, and discrete regulation of the conversion coefficient under the condition that stated power of all reactive elements of the power...
This paper presents a design of a novel RF Power Amplifier which is suitable for Base stations and modern wireless communication systems. High broadband power efficiency is observed from 1.7–2.7 GHz, where PAE> 80% when we use second harmonic input tuning. The main purpose for applying second harmonic tuning circuit is to improve the switching behaviour and enhance the efficiency for a class-E...
Nowadays the characterization of RF devices under large signal is performed in TCAD by using computational load-pull (CLP) simulation technique. In this paper, we modified the CLP simulation technique further to study the switching response of RF-LDMOS transistor for high efficiency switching power amplifier (e.g. class-F). In class-F PA operation, we achieved 85 % power added efficiency (PAE) together...
This article describes a new topology of Matrix Converters with improved conversion and harmonic factors. The output voltage generation techniques are observed and basic states of the proposed circle are given and explained bellow.
This paper presents a new switching strategy controling the most-common, simple, and well-known three-phase six-switch voltage source inverter (VSI). Via this strategy, each one of the six transistors conducts for 150°, instead of the known 180° or 120° conduction-modes, resulting in a new space voltage-vector diagram (SVD). For a wye-load connected to the VSI, the known 6 active and 2 zero voltage-vectors,...
This paper proposes a novel complementary current approach to eliminating the code-dependence in the output impedance of current-steering digital-to-analog converters (DACs), and increasing the spurious-free dynamic range (SFDR) significantly. A 14bit 1.0GS/s current-steering DAC design example shows an SFDR increase of 10∼15dB. In traditional designs, one major effect that degrades the linearity...
This paper presents a new HR mixer that has significantly reduced sensitivity to mismatches in devices operating at high frequencies. HRR for this mixer is primarily determined by resistor and capacitor matching in the low frequency IF section. Significantly improved HRR is achieved as using large resistor areas for better matching does not cause a power or bandwidth penalty in the IF section. Additionally,...
The Class-EF power amplifier (PA) introduced recently has a peak switch voltage much lower than the well-known Class-E PA. However, the value of the transistor output capacitance at high frequencies is typically larger than the required Class-EF optimum shunt capacitance. As a result, softswitching operation that minimizes power dissipation during OFF-to-ON transient cannot be achieved at high frequencies...
A Current Mode Class D (CMCD) power amplifier at 900 MHz is presented. After a theoretical analysis, a class D amplifier is designed, simulated and afterwards assembled and characterized. Thereby, a maximum drain efficiency of 80.6%, and a maximum power added efficiency (PAE) of 72.8% at a switching frequency of 864 MHz, and an output power of 28.2 dBm were obtained. A linear class A amplifier using...
Switch mode power amplifiers offer high efficiency approaching 100% for an ideal case. This paper discusses the operation mode of broadband switch mode class-E power amplifier designed previously by the authors for UHF applications (600 - 1000 MHz). A method to extract the waveforms at the die reference plane from the time domain analysis using 50 Ω environment system is discussed. It has been observed...
This paper presents a 10 W, 2.4 GHz switching-mode power with a GaN HEMT transistor for WiMAX applications. By trading the stability for the efficiency, the overall power efficiency of the designed PA can be increased. It is shown in this paper that the parasitic effect introduced by the stability circuit affects the waveform shaping at large-signal drive level in switching mode PAs and consequently...
This work proposes the steps to design a high efficiency inverse class F power amplifier (PA). In the first step, the optimal termination conditions for the inverse class F are extracted through load-pull measurement. Afterward, low loss and precisely tunable output matching network was chosen in order to obtain high efficiency of the PA. The fabrication of an inverse class F power amplifier for WiMAX...
A delay-locked loop of multi-band selector with wide-locking range and low power dissipation is presented. The architecture of the proposed delay-locked loop consists of phase frequency detector, charge pump, band selector, multi-control delay line, and start-up circuit. The multi-band selector is used to extend operation frequency of delay-locked loop by switching the multi-control delay line. The...
Class D amplifiers are becoming the most feasible solution for embedded audio application. However, distortions due to the non-linear nature of switching stage are the main drawback for this amplifier topology. This paper discusses the design and implementation of high fidelity audio class D using sliding mode control scheme. This design method proves to be a cost effective solution for industrial...
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