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This paper reports a combination structure of temperature and voltage sensor in a 16nm FinFET technology. The circuit transforms PTAT voltage across a resistor into an output clock with PTAT pulse-width. Fabricated in a 16nm CMOS, the temperature sensor achieves 1°C resolution over −10 ∼ 90°C range and the voltage sensor achieves 4mV output error over 0.38V to 0.56V. The total chip size is 0.01mm2...
This paper presents an all-CMOS temperature sensor front-end operating at low supply voltage. The front-end includes a reference voltage generator and a proportional-to-absolute-temperature (PTAT) voltage generator. In order to minimize the errors due to various mismatches, error correction techniques including gain boosting, dynamic element matching, dynamic offset cancellation and clock boosting...
A low power smart temperature sensor followed by an SC amplifier, buffer stage and a 12bit Successive-Approximation analogue-digital converter (ADC) for autonomous multi-sensor systems is presented. The proposed design is accurate within 0.1°C over the temperature range of −55°C to 125°C. A PTAT source like the one presented in [1] was used as a high accuracy temperature sensor. The read-out enables...
Timing-error detection and recovery circuits are implemented in a 65 nm resilient circuit test-chip to eliminate the clock frequency guardband from dynamic supply voltage (VCC) and temperature variations as well as to exploit path-activation probabilities for maximizing throughput. Two error-detection sequential (EDS) circuits are introduced to preserve the timing-error detection capability of previous...
A high bandwidth critical path monitor (1 sample/ cycle at 4-5 GHz) capable of providing real-time timing margin information to a variable voltage/frequency scaling control loop is described. The critical path monitor tracks the critical path delay to within 1 FO2 inverter delay with a standard deviation less than 3 FO2 delays over process, voltage, temperature, and workload. The CPM is sensitive...
A 53 dB gain limiting amplifier for OC-192 and 10 GbE applications is developed in a 50 GHz fT SiGe SOI complimentary bipolar process, and has 5 mV pk-pk sensitivity, 1.25 V pk-pk maximum input signal, 14 ps (20/80%) rise/fall times and 450 mV pk-pk output into matched differential 50 Ohm loads, consuming 430 mW on a 3.3 V supply. Input Cherry-Hooper gain stages limit the -3 dB bandwidth to 11 GHz...
In deep submicron era, to prevent larger amount of SRAM from more frequently encountered overheating problems and react accordingly for each possible hotspots, multiple ideal run-time temperature sensors must be closely located and response rapidly to secure system reliability while maintaining core frequency. This paper presented a method to extract run-time temperature information from multiple...
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