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We present a new methodology for Formal Verification of “Concrete” Digital Circuits. We apply Model checking to a Field Programmable Gate Array (FPGA)-based prototype of the circuit. We are able to establish or demonstrate a working bridge between circuit behaviors in the abstract world of specification, modelling and analysis, and the ones in the post-silicon domain. We suggest that, compared to...
Field-programmable gate arrays (FPGAs) can provide an efficient programmable resource for implementing hardware-based spiking neural networks (SNN). In this paper we present a hardware-software design that makes it possible to simulate large-scale (2 million neurons) biologically plausible SNNs on an FPGA-based system. We have chosen three SNN models from the various models available in the literature,...
Debugging hardware has always been difficult when compared to debugging software, in large part due to a lack of convenient visibility. This paper describes the open NIFD framework that provides software-like debugging facilities to both pure FPGA and hybrid FPGA/software platforms, allowing a designer to treat the hardware logic like a specialized remote software debug target. NIFD provides features...
Pure software simulators are too slow to simulate modern complex computer architectures and systems. Hybrid software/hardware simulators have been proposed to accelerate architecture simulation. However, the design of the hardware portions and hardware/software interface of the simulator is time-consuming, making it difficult to modify and improve these simulators. We here describe the Simulation...
An FPGA-based custom core which computes the Gaussian calculation portion of a Hidden Markov Model (HMM) based speech recognition system, is presented. The work is part of the development of a custom embedded system which will provide speaker independend, large vocabulary continuos speech recognition and is currently presented as a hardware/software codesign. By de-coupling the Gaussian calculation...
Embedded systems are targeted for specific applications under constraints on relative timing of their actions. In this paper, we proposed a co-synthesis approach to hardware/software (HW/SW) co-design for embedded system based on Dynamic Data Flow (DDF). Firstly, we introduced the theory of DDF and presented a methodology of designing embedded system on system-level that depends on decomposing DDF...
The flow of universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In this paper, hardware part and software part of a design are described with SystemVerilog and SystemC, respectively after hardware/software partitioning. The functional interaction...
Branch prediction is an important topic in modern computer architecture research. Predictors attempt to improve the performance of a processor with a reasonable hardware cost. In the last decade, many prediction schemes have been developed in order to achieve this objective, each of them with different cost/performance tradeoffs. Identifying the optimal predictor for a given architecture and set of...
This paper investigates the possibility of implementing a conventional computing architecture that can practically emulate the functionality of a hypothetical quantum computer. The state of the art transistor feature size makes the resource requirement, for emulating quantum computation with a relatively large number of qubits, possible. In this paperwe investigate how a programmable logic array can...
Recently, high-end reconfigurable computing systems have been built that employ Field Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors. These systems not only provide new opportunities for high-performance computing, but also pose new challenges to application developers. In this paper, we build a design model for hybrid designs that utilize both the processors...
Designers of embedded and real-time systems are continually challenged to meet tighter system requirements at better price-performance ratios. Best-practice methods have long promoted the use of commercial-off-the-shelf components to reduce design costs and time to market, but creating COTS components that are reusable in a wide range of applications remains difficult. In part, the challenge lies...
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