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Considering the ability to perform multi-processor architecture systems on FPGA, partial reconfiguration is an opportunity to improve weak soft-core performances by specializing coprocessors according to context-dependent application needs. But at the application level, there is a need for straightforward programming models that allow applications to be easily mapped on an ad hoc architecture without...
In this paper we present a methodology and tool for rapid prototyping of real time image processing applications. We describe our design flow of multiprocessor system on chip (MPSoC) architectures based on hardware/software components. This methodology provides automated methods to specify, generate the hardware, software, and the architectural interfaces between them. Our methodology starts from...
Until today, the efficient partitioning and mapping of applications for multiprocessor systems is a challenging task. The deployment of reconfigurable hardware in this domain helps to meet the application requirements more efficiently due to hardware adaptation at design and runtime, which is not applicable in the traditional multiprocessor domain. To exploit this novel degree of freedom in multiprocessor...
Multi-processors system on chip (MPSOC) is emerging as solutions for high performance embedded systems. Although important work have been achieved in the design and implementation of such systems the issue of parallel software design have not yet been properly evaluated for these targets. We present in this work automatic parallelization experiment results on a 16PE NOC based MPSOC which we designed...
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