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As the electronic packaging density continues to increase, flip chip or stacked packaging via bump bonding is gradually replacing traditional wire bonding and will become the mainstream packaging form in the future. For copper bumps, this new type of electronic interconnection has not yet been fixed by industry standards. Therefore, this paper has made a preliminary study on the reliability of this...
Tin-plated copper structure was widely applied in the electronic products. With the development of the electronics industry, the integration degree increased and the component size reduced obviously. The conventional tin plating technology met the micro-structure challenge; it may not be used in advanced electronic packaging process. The electroless tin plating technology could solve this problem...
Copper/tin thermo-compression bonding technology has been a focus and hot spot of global research institutions for a long time. Inter-diffusion and intermetallic compound (including the metastable η-phase Cu6Sn5 and the stable ε-phase Cu3Sn) formation will occur at the bonding interface during the heating and pressing step of bonding experiments. Considering that tin is easily oxidized and copper/tin...
Satisfying stringent customer requirement of visually detectable solder joint termination for high reliability applications requires the implementation of robust wettable flank strategies. One strategy involves the exposition of the sidewall via partial-cut singulation, where the exposed surface could be made wettable through tin (Sn) electroplating process. Herein, we report our systematic approach...
Sn whisker has been found since 1940s.[1] The formation mechanism of whiskers was controversial. There were two possible mechanisms. Some scientists thought whisker formation were the result of recrystallization or abnormal grain growth, however others suggested that the atomic migration of Cu caused by compressive stress gradient were the main driving force of whisker formation. In latest study,...
In this work, we report the results of in situ Raman monitoring of copper zinc tin sulfide [Cu 2ZnSnS4 (CZTS)], phase under relevant processing conditions at elevated temperatures. CZTS films are prepared from a simple sol-gel method, followed by sulfurization. Raman microspectroscopy measurements are carried out using a 514.5-nm excitation laser on CZTS samples at room temperature and under in situ...
As the advancement of transistor nodes faces unprecedented challenges and work continues to extend Moore's law at the back end of the line (BEOL), packaging has become one of the fastest growing segments in the semiconductor industry. Lead-free soldering is one of the most critical steps in interconnection at the packaging level. The evolution of packaging requirements for various devices is driving...
The requirement of IC packages with fine line features has increased significantly. Semi-Additive Process (SAP) is the traditional way to make copper trace in the organic substrate. However, inadequate adhesion of fine line to dielectric materials occurred in manufacturing for line/space less than 5/5µm. Line embedded (LE) is another way to form fine circuitry. LE technology has several advantages...
In this paper, we present an innovative solution to successfully metallize Through Silicon Vias (TSV) with High Aspect Ratio (10:1). These structures represent a key element in the 3D mid-process integration approach. The metallization consists in depositing, respectively, a diffusion barrier and a seed layer, using two different conformal deposition techniques. The technique used for the barrier...
Promoted by the component miniaturization trend, three-dimensional integration appears as a promising option for implementation of the next generation of integrated circuits. In this context, copper is still an interesting material to be integrated to vertical interconnexion through direct metal-metal bonding processes. However, it was already reported that voiding phenomena occur in bonded copper...
The process of singulating IC packages such as Quad Flat Pack No-Lead (QFNs) by either a sawing or punching operation results in exposed copper on the sidewalls. This exposed copper surface can oxidize leading to poor or no solder wetting up the sidewall during the assembly operation. The consequence of this oxidized copper surface is either incomplete or no solder fillet formation during the PCB...
Copper dendrites on a flip chip die was analysed by SEM/EDX, FIB and TEM. The dendrites were found to consist of two layers. The upper layer visible under optical and SEM inspection consist of a carbon rich copper compound. TEM analysis revealed another layer under this carbon rich layer that consist of copper, tin and lead compounds. A possible mechanism of dendrite formation due to an electrochemical...
In this study, we firstly synthesized ternary Cu2SnSe3 nano ink by novel organic solvent polyetheramine by solvent-thermal reflux method. Cu2SnSe3 thin films were prepared by solvent-thermal reflux method for Cu/Sn ratio in three different ratios of 2/1, 1.8/1, and 1.4/1. Structure, surface morphology, composition, and electrical and optical properties at different process conditions were measured...
Formation of Cu-Sn intermetallic compounds has been studied with thin Sn and Cu films deposited by physical vapor deposition. The influence of annealing time at 250°C and 320°C highlights a rapid interdiffusion of copper and tin, leading to the formation of Cu6Sn5 and Cu3Sn phases. Application to 100 mm wafer bonding has been implemented at 250°C and 320°C, which shows that stress induced by the deposits...
TiN metal hard mask (MHM) scheme has become necessary in Cu interconnects when ultra-low k (ULK) materials is introduced. As scale down, the biggest challenge of MHM scheme is how to control the residual stress of TiN layer as the poor mechanical strength of ULK. The deformation (even collapse) of trench structure is found because of the high residual compressive stress in TiN film and Cu voids occur...
The use of embedded Wafer Level Ball grid array(eWLB)[1] technology for the construction of single and multiple side by side die packages has become widespread since the introduction by Infineon technologies more than five years ago. The flexibility of this packaging to include different die material types such as Si and GaAs combined with excellent mechanical, electrical and thermal performance and...
The SnPb solder ball was reflowed on the Cu film in a flow of reducing gas, and the reactive spreading process was in situ recorded by a CCD camera. On the thicker Cu films, it was observed that dewetting did not happen even if the Cu6Sn5 intermetallic compounds spalled into the liquid solder. However, on the thinner Cu films, dewetting would occur when the liquid SnPb solder consumed the underneath...
The intermetallic compounds, Cu6Sn5 and Cu3Sn, have been prepared via layer-by-layer and single-layer electroplating with subsequent annealing. The two preparation methods were compared in terms of annealing temperature and time, different electroplating effect, and film thickness. Moreover, two copper plates were joined together to form a full-IMC (Cu6Sn5 and Cu3Sn) joint. The shear mechanical property...
(****)Aimed at the unstable output phenomenon of one type of power amplifier in the process of using, previous examinations have located the problem in internal inductance coil. To determine the reason of the fault amplifier, scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS) have been used to analyze the microstructure and composition of abnormal substances in the bend of...
In this paper, tin whisker behaviour of electroplating tin coating was studied in different environments. Different thickness of electroplating tin coating on copper substrate had been tested. Two different environmental conditions had been applied :one temperature tests (70 °C)and one external force tests(70 °C /17.5N). The growth of tin whisker was studied by using scanning electron microscopy (SEM)...
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