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The hexagonally ordered patterns by self-assembly of block copolymer with diameter and spacing down to 23 nm and 15 nm, respectively, are capable of producing Si nanopores with high aspect ratio from patterned Au film. The etching feature size seriously depends on the block copolymer pattern template. The prepared nanostructure patterns were used as substrates for surface enhanced Raman spectroscopy...
Transdermal drug delivery is an important approach due to its advantages of controlled release, easy wiping off, high safety and low degree of side effects. However, the efficiency and success of the drug delivery method is seriously hampered by the incapacity of many drugs to cross the skin at therapeutically useful rates. A microneedle approach can dramatically promote transdermal delivery, especially...
Based on the previous work, we continued a study on improving the emissivity of radiation layer and the perfection of release process developed for electrical modulation pulsed MEMS infrared (IR) source used in NDIR gas sensors. Two different fabrication processes of nano-scale silicon forests were produced by reactive-ion etching (RIE) dry etching poly silicon beneath the aluminum wire bonding pad...
Gold (Au) nanoelectrode ensembles (NEEs) were investigated after the synthesis of silicon nanowires using the metal assisted chemical etching technique. Structural and non-destructive optical characterization of silicon nanowires are carried out to determine its morphology and crystallinity. The cyclic voltammetry technique is used to determine the oxidation-reduction potentials of the sensor at different...
In this paper, we show the process and integration results of small TSVs integrated by 300mm 3DIC BTSV process. The TSV size is from 2um to 3um (in diameter) with aspect ratio of 10. The achievements of this work are: 1) successful demonstration of 20um thin wafer process by ITRI's 300mm wafer thinning process; 2) 2∼3um TSV patterning and etching performed by backside TSV process; 3) Combination of...
Point of care testing (POCT) systems, are widely used to firstly, diagnose and secondly, monitor a number of illnesses and infectious diseases. This research aims to develop the integration between an optical fluorescence system and a microfluidic chip - through the use of advanced manufacturing techniques, such as anisotropic wet etching of Silicon (Si) wafers. The fabricated Si microfluidic chips...
As the electronic devices miniaturization roadmap trend is pursuing, 3D technologies have also emerged and appeared as one serious option for the next generation of semiconductors industry. The purpose of this paper is to introduce the complete development of fine pitch microbumps and micropillars for chip to wafer interconnections on 300 mm wafers using industrial tools and with already existing...
SiF4 PLAD has been systematically characterized and optimized. The correlations between the etching, deposition, retained F dose and profile as functions of the PLAD process variables including implant voltage, RF power, pressure, pulse duty cycle, and the diluting gases have been extensively investigated. It was found that PLAD process by using pure SiF4 is in an etching or RIE regime, but can be...
This work addresses on the fabrication of ion-sensitive field-effect transistors with the multiple Ω-shape nano-channels. The Ω-shaped channels with the width/space about 1∶1, 200/200 nm, were fabricated by the thermal nanoimprint lithography and the anisotropic/isotropic dry etching processes. The sensing properties of proposed ISFETs were studied and compared with the conventional single channel...
According to the Bloch theorem and the symmetry of superlattice configuration, a new 3D finite element method is employed to calculate the miniband structure and density of state for well-aligned Ge/Si QDs array. This method can overcome the approximation of multi-dimensional Kronig-Penny model and constrain on QDs superlattice structure. The interaction of electronic structure among Ge/Si QDs with...
This work reports on metal assisted chemical etching (MACE) for high aspect silicon structures. Ultra-high aspect trenches and pillars of 400 and 80, respectively, have been achieved by MACE. Additionally, a cantilever fabrication based on above pillars is demonstrated by using assembly technology. The pillars are assembled onto glass substrate and fixed by conductive glue. The fabricated cantilever...
Standard lithographic free wet etching process applied to thin (100 µm) p-type 156*156mm2 Czochralski (CZ) silicon to generate random micro pyramids with variable heights from 2 to 5 µm, which leads to reduce the surface reflection upto 10% by scattering. The present study mainly focus on to optimize etching recipe for maskless damage free neutral beam etching (NBE) to drill low aspect ratio nano...
Control and mechanism analysis of Ge quantum dot (QD) formation on Si(100) by using two carbon (C) mediated methods, c(4×4) surface reconstruction (SR) and solid-phase epitaxy (SPE), was demonstrated for the first time. Si surface was reconstructed via the formation of C-Si bonds in advance of Ge deposition in SR method, QDs grew in Volmer-Wever mode due to the preferential nucleation on uncarbonized...
Novel light trapping structure was fabricated on crystalline silicon wafers by KOH etching using Ge dots as an etching mask. In this method, it is found that the density of Ge dots before etching is important for the density of nanostructure after etching. The depth and density of the nanostructure after etching can be controlled by changing the etching time. Reduction of reflectance was successfully...
Several-ten nanometer-width Ge Fin structure with defect-free, vertical and smooth sidewall were successively delineated by a neutral beam etching method using pure Cl2 gas chemistry for developing three dimensional channel FETs. The cross-sectional profile of the Ge Fins tended to have bottom tails without undercuts beneath etching masks in the best etching conditions. The bottom tails were eliminated...
In this paper, we present the fabrication and thermal conductivity measurements of a 10 nm-diameter Si nanowires (SiNWs) array for thermoelectric (TE) devices applications. The SiNWs were fabricated by bio-template and neutral beam etching techniques. Then, the SiNWs were embedded into spin-on-glass (SOG) for the measurement of the thermal conductivity. The measured thermal conductivities of the SiNWs...
We report a comprehensive etching study on the gate recess step for the fabrication of the novel high speed pHEMT devices. The experiments focused on the elimination of “hump” structure as a result of an incomplete etching process at the InGaAs cap layer. In this work, two types of test samples were used, namely bulk InGaAs and epitaxial structure together with an etch stop layer. The result showed...
This paper presents a high-performance bulk silicon comb-drive actuator with low driving voltage and large displacement. The bulk silicon comb-drive actuator is fabricated by a simple bulk micromachining process based on the low temperature Au-Au bonding technology. A cascade folded beam is designed to improve the displacement of comb-drive actuator at low driving voltages. The instability of the...
This paper shows a fabrication process and device characteristics of the tunable monocrystalline silicon grating on LSI circuit. The thin monocrystalline silicon with thickness of 260 nm was transferred on the LSI circuit, by using the two-step polymer bonding process consisting of polymer patterning and bonding, and liquid-polymer filling. Furthermore, the grating was fabricated on the LSI circuit...
While nanostructured surface such as black silicon is an efficiency way to reduce the surface reflection, the high surface area impedes the application of photoelectronic conversion. On the other hand, micropillar is a promising alternative to efficiently collect carriers, but the pillar diameter is usually larger than the wavelength of light that makes surface reflection high. In this study we report...
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