The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
In this work, we investigate the dual gate positive feedback field-effect transistor (FBFET) using DC and transient TCAD simulation. I-V characteristics, subthreshold swing, and transient characteristics are analyzed. The FBFET has steep switching property and low off current. We design an inverter that can low power operate with the FBFET. By using the FBFET, the stand-by current is effectively suppressed...
This paper presents a three-phase isolated soft-switching dc-dc converter suitable for high-power applications. Three-phase star-connected high-frequency transformers provide isolation between input and output. Primary-side of the converter consists of three-phase inverting bridge with reverse-blocking switches. Secondary-side consists of three-phase diode bridge followed by dc output capacitors,...
We report, for the first time, a gate last process, used to fabricate Negative Capacitance field effect transistors (NCFETs) with Hf0.5Zr0.5O2 (HZO) as ferroelectric (FE) dielectric in a metal/ferroelectric/insulator/semiconductor (MFIS) configuration. Long channel NCFET's with HZO thickness down to 5 nm exhibit consistent switching behavior with switching slope (SSrev) below kT/q over four decades...
To optimize the classic design trade-off between EMI noise and power efficiency in GaN power drivers at 10MHz and beyond, a closed-loop adaptive Miller Plateau sensing (AMPS) technique is proposed. In order to mitigate long delays and low accuracy issues in conventional Miller Plateau (MP) sensing approaches, an emulated MP tracking (EMPT) technique is adopted to achieve instant MP start point sensing...
A device-based health conditions monitoring and diagnosis method for inverters is present. In the inverter, SiCGTO (Gate-Turn-Off Thyristor) is considered as the key device to achieve pulse-width modulation. So the performance degradation of SiC-GTO device induced by interface-states is critical for the health conditions of inverters. In the research, key electrical parameters, including the forward...
We describe a multi-layer security system called "Application Protected Execution" (APEx) that has an "In-VM monitoring" functionality protected by out-of-band memory created within a Virtual Machine (VM) on cloud-based nodes. The In-VM monitor functionality protects execution of security related software and is triggered by hooked system events to avoid context switched overhead...
In this paper, a 9-bit 1.3 GS/s single channel SAR ADC is presented. In conventional SAR ADCs, the capacitive DAC size grows exponentially with respect to converter resolution. This results in both signal bandwidth and conversion speed reduction. The proposed architecture implements binary search through a redundant capacitive DAC for the 5 first MSBs and through programmable comparator thresholds...
Shannon's seminal work on Boolean operators — AND, OR, NOT has been the backbone of on-chip digital logic design. This set of the so called basic gates excludes an important mathematical logical operator — the Material Implication (IMP) logic (and its complement (NIMP)), shown in Fig. 1(a). IMP gate along with a NOT/XOR/NIMP gate forms a complete logic basis. Moreover, including IMP as a basic gate...
In this work, we demonstrate a new concept for realizing high threshold voltage (Vth) E-mode GaN power devices with high maximum drain current (ID, max). A gate stack ferroelectric blocking film with charge trap layer, achieved a large positive shift of Vth. The E-mode GaN MIS-HEMTs with high Vth of 6 V shows ID, max 720 mA/mm. The breakdown voltage is above 1100 V.
This paper discusses the industrial and research status of CMOS and CMOS-like commercial and emerging technologies. Effects of scaling on transistor cost, max. system complexity and performance are discussed. Performance of state-of-the-art CMOS VLSI systems is power-constrained. To discuss various existing and emerging technologies, a model of an abstract, technology-independent ideal switch is proposed...
In this paper, a parallel arrangement of a silicon MOS-gated thyristor structure and a silicon carbide Power MOSFET is proposed and experimentally demonstrated for the first time. Experimental results show that the hybrid switch exhibits low conduction losses at low current levels as well as large current-carrying capability at high current levels. In addition, compared to Clustered IGBT structure,...
The paper presents a design method of a gallium-nitride high-electron-mobility-transistor (GaN-HEMT) based three level T-type neutral-point-clamped (NPC) inverter using a reverse-conducting mode of the GaN-HEMT. The GaN-HEMT provides high-frequency switching speed and the T-type inverter supports such switching by decreasing conduction loss and heat dissipation. The GaN-HEMT has two operation mode,...
The failure of power converters is currently the main reason of stopping for wind turbines. The unpredictable nature of wind power flow causes temperature swings to the semiconductor devices, which leads to additional thermal stresses and, eventually, unexpected failures. A suitable way to avoid this is using condition monitoring systems, which detect the degradation of the devices and reduce the...
Spintronic devices have the potential to lower the power consumption of computing architectures such as Arithmetic Logic Units (ALUs). However, the existing spintronic ALUs still rely on charge current, which doesn't allow exploiting the spin devices properties for information transmission. All Spin Logic (ASL) devices based circuits have the potential to further improve these circuits and systems...
To optimize the classic design trade-off between EMI noise and power efficiency in GaN power drivers at 10MHz and beyond, a closed-loop adaptive Miller Plateau sensing (AMPS) technique is proposed. In order to mitigate long delays and low accuracy issues in conventional Miller Plateau (MP) sensing approaches, an emulated MP tracking (EMPT) technique is adopted to achieve instant MP start point sensing...
This paper presents a 510nW 12-bit 200kS/s SAR-assisted SAR ADC in 40nm CMOS at 0.7V supply. A re-switching technique is proposed to suppress DNL spikes so that the size of DAC capacitor array can be minimized to reduce switching energy. A set of 2-way charge pump is used to decrease settling time constant and to increase sampling linearity. The prototype ADC achieves the DNL/INL performance of 0...
The reduction of electromagnetic emissions (EME) in switch mode power supplies (SMPS) has high importance especially in automotive applications. The main methods to influence the switching behaviour of SMPS are external filters, spread spectrum techniques and the output driver circuits. This paper presents the concept and its implementation of an output driver with adaptive current source control...
Owing to Ethernet's low cost, high bandwidth and architecture openness, much attention has been paid to develop converged Ethernet to support both time-critical services and conventional communication services on a unified network infrastructure. The greatest challenge here is providing low and deterministic latency for time-critical packets. Recently, the IEEE time sensitive networking task group...
A concept for a slope shaping gate driver IC is proposed, used to establish control over the slew rates of current and voltage during the turn-on and turn-off switching transients. It combines the high speed and linearity of a fully-integrated closed-loop analog gate driver, which is able to perform real-time regulation, with the advantages of digital control, like flexibility and parameter independency,...
A compact nanoscale device emulating the functionality of biological synapses is an essential element for neuromorphic systems. Here we present for the first time a synapse based on a single ferroelectric FET (FeFET) integrated in a 28nm HKMG technology, having hafnium oxide as the ferroelectric and a resistive element in series. The gradual and non-volatile ferroelectric switching is exploited to...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.