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This work demonstrates high quality Ge/GeO2 interfaces fabricated by O2 RTA that are degraded by a good quality SiO2 layer deposited by ALD. However, neither O3 and H2O precursors commonly used during subsequent high-k ALDs nor Si precursor AP-LTO-330 do not degrade the interface. Thus Dit increase after SiO2 deposition is likely due to intermixing. Therefore, the effect of subsequent ALDs on the...
This work investigates light emission from silicon with embedded Sn nanocrystals. The composition of the nanocrystals is determined to be pure Sn by atom probe tomography, and the light emission is strongest when the nanocrystal structure is closest to the host Si lattice diamond structure.
Silicene, the silicon analogy of graphene, has attracted tremendous attention. Also the formation of alloys that exist only in a confined region near the surface of materials has important technological implications. In this work, we study the structural transition for silicon adsorption on Ag(111) to form a highly ordered 2-D structure and to observe the alloy formation of Si-Ag as an example of...
For a sealing of organic electro luminescence displays and lightings, it is required that polymer films are bonded at room temperature without organic adhesives. A new bonding technique called modified surface activated bonding (mSAB) was presented to meet the requirement. However, the bonding fails particularly when vacuum condition isn't good (around 10−5 Pa). To solve the problem, polymer films...
Point defects introduced by homoepitaxial growth of thin films on SrTiO3 substrates were studied by means of positron annihilation. The SrTiO3 films were grown by molecular-beam epitaxy (MBE) without using an oxidant. The line-shape parameter S was found to be increased by the growth of the film, which was attributed to the diffusion of oxygen from the substrate into the film, and the resultant introduction...
We report electrically-induced, explosive atomization of metals and analytes at nanoscale. The phenomenon involves formation of highly-localized nanoscale leakage channels in the oxide layer of a metal-oxide-semiconductor (MOS) structure under pulsed drive, ballistic transport of injected electrons in the nanoscale void channels, impact ionization of metal atoms, and explosive atomization of metal...
A direct high-k/Si gate stack has been proposed for gate oxide scaling. With LaCe-silicate, an EOT of 0.64 nm with an average dielectric constant (kav) of 17.4 has been obtained and an extremely low gate leakage current (Jg) of 0.65 A/cm2. The flatband voltage (Vfb) can be controlled by the compositional ratio of La in the LaCe-silicate layer. Furthermore, incorporation of Ge atom into the silicate...
A ruthenium (Ru) film was deposited by physical sputtering in an N2 atmosphere on a low-k SiOC dielectric film. This Ru deposition process modified the surface of the underlying low-k SiOC to a higher density SiOC(N) layer of approximately 3 nm thickness. This combined SiOC(N) / Ru stack showed good barrier properties without the need of any other barrier layer. This new stack structure removes the...
At a given thickness of HfO2, atomic layer deposited (ALD) TaN metal-gates showed higher equivalent oxide thickness (EOT) and flat-band-voltage (Vfb) shift compared to physical vapor deposited (PVD) TaSiN after annealing at 750degC for 30 min in N2. TEM data revealed the growth of a thicker interfacial oxide of 1.7 nm for TaN compared to 0.9 nm for TaSiN. In addition, TaN showed higher effective workfunction...
An independent-gate four-terminal FinFET SRAM have been successfully fabricated for drastic leakage current reduction. The new SRAM is consisted of a four-terminal (4T-) FinFET which has a flexible Vth controllability. The 4T-FinFET with a TiN metal gate is fabricated by a newly developed gate separation etching process. By appropriately controlling the Vth of the 4T-FinFET, we have successfully demonstrated...
Reliabilities of high-k stacked gate dielectrics are discussed from the viewpoint of the impact of initial traps in high-k layer. TDDB reliability can be explained by the generated subordinate carrier injection (GSCI) model. While initial traps increase the leakage current, they do not degrade the TDDB reliability. In contrast, the BTI reliability is strongly degraded by initial traps.
Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential...
Novel 3D stacked gate-all-around multichannel CMOS architectures were developed to propose low leakage solutions and new design opportunities for sub-32 nm nodes. Those architectures offer specific advantages compared to other planar or non planar CMOS devices. In particular, ultra-low IOFF (< 20 pA/mum) and high ION (> 2.2 mA/mum) were demonstrated. Moreover, those transistors do not suffer...
Plasma-exposed Si surface related to Si recess in source/drain region was investigated in detail for various superposed bias configurations with frequencies of 13.56 MHz and 400 kHz. Two different bias powers were utilized by an inductively coupled plasma reactor (ICP). The surface layer (SL) and the interfacial layer between the SL and Si substrate (IL) were analyzed by spectroscopic ellipsometry...
A valence-mended semiconductor surface is free of dangling bonds and free of surface states. Such a surface is accomplished by depositing a single atomic layer of valence-mending atoms on the surface. For the Si(100) surface, valence-mending atoms include sulfur and selenium, while fluorine, chlorine and bromine serve as valence-mending atoms for the Si(111) surface. This surface passivation technique...
The HfO2/Hf stacked film has been applied as the gate dielectric in MOS devices. The HfO2 thin film was deposited on p-type (100) silicon wafers by atomic layer deposition (ALD) using TEMAH and O3 as precursors, Prior to the deposition of HfO2 film, a thin Hf metal layer was deposited as an intermediate layer. The deposition temperature of HfO2 thin film was 350degC and its resulted thickness was...
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