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IEEE 802.16 is a Wireless Metropolitan Area Network (WMAN) technology that supports both high speed data transmission and quality of service (QoS). Other than the data speed, QoS is always another concern to the end users and applications. However, providing QoS in IEEE 802.16 is a challenging mission because it involved many components that interact with each other. One of the important components...
A 1 GS/s Continuous-time Delta-Sigma modulator (CT-ΔΣM) with 31 MHz bandwidth, 76.3 dB dynamic range and 72.5 dB signal-to-noise is reported in a 0.13µm CMOS technology. The design employs an excess loop delay (ELD) of more than one clock cycle for achieving higher sampling rate. The ELD is compensated using a fast-loop formed around the last integrator by using a sample-and-hold. Further, the effect...
This paper demonstrates the effectiveness and robustness of amplifier finite gain bandwidth compensation within a wideband third order continuous time delta sigma modulator and the effects of process, mismatch and temperature on modulator stability. In many state of the art designs, GBW is kept safely above the sampling frequency of the modulator, which suffers a power penalty especially for high-speed...
Recent advances in ADCs have enabled the development of low power receivers for wireless communication applications. In this paper we will discuss a specific class of ADCs, namely sigma delta ADCs. A brief overview of challenges in the design of these ADC's will be discussed along with the recent advances and techniques in overcoming these challenges. Two specific examples in the context of narrow...
Continuous-time delta sigma (CT-ΔΣ) ADCs are established as the data conversion architecture of choice for the next-generation wireless applications. Several efforts have been made to simultaneously improve the bandwidth and dynamic range of ΔΣ ADCs. We proposed using two-step quantizer in a single-loop CT-ΔΣ modulator to achieve higher conversion bandwidth. This paper presents a tutorial for employing...
This paper proposed a coding mode selection method for video transmission over wireless networks. Unlike previous mode selection methods disregarding channel distortion or assuming constant packet loss rate (PLR), this method includes a cross-layer controller to collect both source and channel information. The mode selection process is formulated as a delay constrained distortion minimization problem...
Σ-Δ estimation is a simple non linear method of background estimation used in the field of image processing. We propose the method of data transmission using the Σ-Δ modulation under narrow bandwidth, which degrades the performance due to time-discretization. In this paper, the Σ-Δ estimation is used as a method of motion detection of motors, and high priority is added to detected data. Hierarchical...
The IEEE 802.16 is a standard for broad band wireless communication in Metropolitan Area Networks. The rate allocation is needed to provide QoS guarantees as well as fairness among the users. Channel error is one of the factors which disrupt the fair allocation of any traffic. In this paper, we propose performance evaluation of Wi-MAX based on band width and fairness, condition based rate allocation...
Medium Access Control (MAC) scheduler entity forms one of the most important parts of any high speed packet access system like HSDPA or LTE. To the best of our knowledge the LTE MAC schedulers that had been proposed so far constitute of sub-carrier resource scheduling mostly based on single criteria like user throughput, link conditions, buffer constraints or power requirement. The above LTE MAC scheduler...
This paper presents the design and implementation of a low power, low voltage, continuous time delta sigma modulator for audio band in 90 nm CMOS technology. A VCO-based integrator and quantizer are used. Inherent dynamic element matching (DEM) of the quantizer eliminates the need for explicit DEM logic which results in a short excess-delay and power saving. Simulation results show that the modulator...
We investigate the use of impulsive ultrawide band (I-UWB) modulation over medium voltage (MV) power line channels for low data rate communications. In particular, we consider a MV network where a channel measurement campaign has been carried out. In this paper, we firstly describe the MV test network. We study the statistics of the MV channels in terms of both root-mean-square delay spread (RMS-DS)...
The intention of this work is to realize a power and area-efficient 50MS/S ΔΣ modulator with an OSR of only 10, an effective linearization without DEM, and a very low power ELD compensation. This is achieved by using a digital DAC error estimation and correction, and a compensation for finite gain-bandwidth (FGBW) in all feedback amplifiers. A multi-bit 3rd-order, mixed feedforward-feedback compensation...
We present on-chip, all-optical pulse erasure for enabling ultrahigh-bandwidth signal processing. 15 dB pump depletion is achieved for picoseconds pulses using the instantaneous χ(3) nonlinearity in a dispersion-engineered chalcogenide waveguide.
In the past decade, the current and envisaged GNSS systems have seen major developments, both in terms of interoperability and compatibility, as well as accuracy, performance, and availability. In particular, the emergence of Galileo and the evolution of other Global Navigation Satellite Systems (GNSS) have not only brought forth new opportunities and applications, but also new signal structures....
Characterisation of modern wireless power transistors and amplifies requires wideband-modulated stimuli for realistic performance evaluation. Normally power transistor performance is evaluated using passive load-pull techniques. However, these have some physical realization constraints that influence the amplitude and the phase of the presented impedance at the DUT plane as across the modulated bandwidth...
A low power, high resolution two-step hybrid delta-sigma/pipelined modulator (HDSP) is presented. The feedback architecture of the HDSP modulator is modified to allow higher orders of noise shaping. The pipelined quantizer is simplified. Finally, the input signal range of the HDSP modulator is extended beyond the supply voltage. The prototype chip is implemented in a 0.18/im CMOS process. With a 1...
A third-order continuous-time delta-sigma modulator achieving 76dB dynamic range over 5MHz signal bandwidth is presented. The modulator has a monotonic lowpass signal transfer function and achieves over 70dB anti-aliasing. The prototype chip implemented in a 130nm CMOS process consumes 6mw power from a single 1.2V supply and occupies 0.56 mm2 active area.
Visible light communication networks are currently constrained in range by the divergent source characteristics of the light emmiting diode (LED) and in achievable rate by the modulation bandwidth of the LED transmitter; however, as device advancements improve the limitation on rate becomes inter-symbol interference (ISI). The key contributor to ISI is the non-uniform time of arrival (TOA) of all...
This paper presents a new operational amplifier sharing technique for a continuous-time ΔΣ analog-to-digital converter (ADC). This technique saves power consumption by reducing the number of active elements in the modulator. Furthermore, the shared amplifier acts both as an adder and integrator in two different clock phases. The proposed technique also can be realized in a noise-coupled delta-sigma...
This paper evaluates the major MAC enhancement of IEEE 802.11n to realize high throughput, i.e. frame aggregation. In contrast to existing studies of this enhancement, we analyze the efficiency instead of the mere performance. The results show significant efficiency improvement by frame aggregation. Furthermore, the efficiency analysis leads to important conclusions for system configuration and adaptation...
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