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Lab-on-chips (LOCs) are small systems, which integrate, in the same device, several functions involving chemical analysis with bio-processing functionalities typically performed in a laboratory. As a consequence, it is a multi-domain system that can be described and designed with VHDL-AMS, a hardware description language that natively supports electronics, thermics and fluidics. On the other hand,...
We recently demonstrated that it is possible to model and to simulate biological functions using hardware description languages (and associated simulators) traditionally used for micro-electronics. The main drawback of these languages is that they do not support partial differential equations. However, for several applications in biology, space-dependent quantities are unavoidable. This paper deals...
The Robert Bosch GmbH is the world's largest supplier of micromechanical sensors in automotive and consumer applications. Achieving a high quality and cost effectiveness in automotive and consumer applications an advanced design flow is required to fulfill these criteria. In here a method and algorithm is presented to ensure a high functionality and yields of micromechanical sensors.
The design of advanced integrated circuits (IC) in particular for low power analog and radio-frequency (RF) application becomes more complex as the device level modeling confronting challenges in micro- and nano-meter CMOS processes. As present CMOS technologies continue geometry scaling the designers can benefit using dedicated SPICE MOSFET models and apply specific analog design methodologies. The...
In this paper a gradual investigation of a particular Hall sensor in SOI (“Silicon-On-Insulator”) technology is presented. The most important parameters of a specific Hall cell, based on SOI structure, are evaluated through three-dimensional physical simulations. The fact that the depth of the active silicon layer in SOI integration process is much smaller than in a regular CMOS is immediately reflected...
This paper is concerned with the development and evaluation of a number of modelling techniques which improve Qucs Harmonic Balance simulation performance of RF compact device models. Although Qucs supports conventional SPICE semiconductor device models, whose static current/voltage and dynamic charge characteristics exhibit second and higher order derivatives may not be continuous, there is no guarantee...
In the paper a simple compact model of a transfer of a mechanical energy into an electrical energy is presented. The mechanical energy is stored in a vibrating bimetallic membrane with an electret layer. The membrane vibrations are forced by a set-up consisting of a cold and hot surfaces. During the vibrations this set-up acts as a variable capacitor with one of the electrodes being constantly charged...
The aim of the present work is the construction of a nonlinear dynamic model of lung/airway mechanics using generic instead of specific software, in an attempt to offer an open simulation environment. Based on the analogy between pneumatic and electric magnitudes, an electrical equivalent circuit of the lung/airway mechanics is derived. Then, the nonlinear circuit elements are constructed by means...
Recently, the Tunnel-FET is gaining interest due to its possibility to overcome the 60 mV/dec subthreshold slope limitation of the standard MOSFET. Due to its band-to-band (B2B) tunneling-based current transport mechanism, the requirements for sufficient tunneling models are raising. By taking into account various barrier shapes, tunneling distances and energy levels, the wavelet-based calculation...
This paper presents a semi-empirical model of the mobile charge in the channel of a junctionless dual-gate MOSFET. Its accuracy has been demonstrated to be better than 1% of the total depletion charge for a wide range of channel thickness and substrate doping values.
Two simple non-iterative methods of MOSFET threshold voltage parameter extraction are presented. They are valid for threshold voltage-based and charge-based compact models of MOS transistors. The methods take advantage of the features of the model formulae and their derivatives. The methods have been illustrated using both real measurements and data obtained via simulation of simple circuits used...
In this paper, a wide-band fully differential linear low noise amplifier (LNA) in a standard 130nm CMOS process is presented. The LNA utilizes Active Post Distortion (APD) as a voltage combiner that prepares a linear transconductance for enabling harmonic cancellation, which can also mitigate the impedance matching device noise. The impedance matching device is connected to the output transistors...
In this work, a 6-bit 800 MS/s flash analog-to-digital converter (ADC) is proposed. An optimized resistance ratio averaging scheme is applied to: (1) reduce the offset, nonlinearity, (2) increase the accuracy and mismatch insensitivity (3) minimize the size of elements towards the more compact size, smaller area and higher speed for the ADC. To maximize all these achievements, most favorably, it is...
A low-voltage fully differential current-mode continuous time delta-sigma modulator is presented for application in electrochemical sensor arrays. Although a first order topology is realized by using a single differential integrator, second order noise shaping is achieved. A differential quantizer based on current controlled oscillators (CCOs) allows a current-mode implementation with high noise-immunity...
This paper presents the comparison of main properties of two recently developed methods for precise time-to-digital conversion based on time coding respectively in independent coding lines and with the use of multi-edge pattern signal. An essential advantage of these methods consists in capability to overcome the technological limitation of conversion resolution of methods commonly used so far. Both...
This paper introduces a design independent extension to RTL-to-GDS design-flows for seamless insertion of timing-detection flip-flops at critical paths of a digital CMOS standard-cell circuit. It is possible to detect timing-errors for general purposes at any critical path including enable-inputs of clock-gating cells with typically 15% area overhead for 20% endpoint coverage while maintaining DFT...
A high spatiotemporal resolution, wireline operation-based, in-vivo neural recording system is presented. The proposed system allows selecting 64 channels from 512 recording sites. The neural signals from the 64 selected sites are amplified, filtered, and finally multiplexed in the time domain. The output signals of each multiplexer are buffered, converted to the current domain, and then transferred...
In this paper a new voltage reference circuit concept is introduced. The presented voltage reference circuit is especially useful for low power applications. The reference circuit has two modes: the high accuracy and the low power mode. During the high accuracy mode the energy consumption is much higher than during the low power mode where accuracy is secondary. The fields of application are use cases...
This paper devotes to a new 7-2 compressor designed according to a new architecture with a pure Glitchless output. A considerable increase in the speed of the operation is achieved by utilizing a new truth table, fast production of signals Cout1 and Cout2, optimum tuning of the width of the utilizing transistors, and eliminating the parasitic capacitances through merging the drain of transistors....
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