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AlGaN/GaN high electron mobility transistors (HEMTs) are one of the prospective candidates for high switching frequency power electronics applications thanks to its wide band gap (3.4eV), high breakdown voltage, large critical electric field, high carrier mobility, and the inherent high speed characteristics. With the high power densities that AlGaN/GaN HEMTs are capable of reaching, heat dissipation...
In the direct-water-cooled power module, there is a small gap between the heatsink and the channel wall. This gap results in bypass flow that reduces the pressure drop while maintaining high heat transfer. In this paper, we discuss the effect of this gap on both pressure drop and heat transfer over pinfin heatsinks using our semi-analytical model based on mass, momentum, and energy conservation within...
We developed the direct-liquid-cooling IGBT module which enabled downsizing of a power control unit for HEV system and high reliability simultaneously. This module eliminates thermal grease by unifying a ceramic substrate and a heat sink. It contributes this module realized the reduction of thermal resistance 30 % compared to the conventional indirect liquid cooling type. High thermal conductive Si...
Novel 200V power devices, including the n-type lateral insulator gate bipolar transistor (nLIGBT), the n-type lateral extended drain MOS (nLEDMOS) and the p-type lateral extended drain MOS (pLEDMOS), have been fabricated by using the special 0.5μm inverted HV-well SOI technology. All the novel devices own larger current density, higher off-state breakdown voltage (BV) and better hot-carrier reliability...
The tridimensional channel SOI-LIGBT on 1.5μm thin SOI layer is developed in this paper. The key feature of the device is that there are numerous separated P-body cells located in the emitter region, which can increase the efficient channel width, enhance electron injection and attain a large current capability. The proposed SOI-LIGBT exhibits the current density of 150A/cm2, which has an improvement...
A novel low-side structure based on the optimum variation lateral doping (OPTVLD) technique, which is formed by many inner VDMOS cells combining an outermost LDMOS, is realized in the 0.8μm BiCMOS-compatible technology. With the benefit of the additional vertical cells, it presents a low specific on-resistance with high breakdown voltage, which significantly advances the prior art. Furthermore, since...
This paper presents a circuit design and efficiency study for integrated converters with switching frequencies up to 15 MHz at high conversion ratio with input voltages up to 40 V and output voltages <5 V. An asynchronous buck converter is well suitable, while in contrast, a synchronous topology causes larger switching losses due to its low side switch. Critical design aspects are presented along...
In this paper, we discuss the fundamental design tradeoff among specific on-resistance (Ron, sp), gate charge (Cgg), quasi-saturation, and reliability characteristics for an integrated high voltage LDMOS. A novel patterned gate design is proposed and implemented in a 120V-rated NLDMOS. Optimal design characteristics are demonstrated with 30% improvement in switching FOM (Ron, sp∗Qgg) and a robust...
A new concept to realize the usage of a high-voltage bootstrap diode without substrate leakage current for 120V high-side-driver application is proposed and verified by 2D simulation. The combination of high-voltage (HV) JFET and medium-voltage (MV) diode with proper modification to avoid substrate leakage current at forward conduction state and high-blocking voltage at off state for integrated bootstrap...
A high speed lateral SOI IGBT (BM-LIGBT) with an electronic barrier modulation structure, which was not reported in previous literatures, is proposed in this paper in order to remarkably improve turn-off speed of the SOI LIGBT. Two important mechanisms are realized in this device: one is the electronic barrier modulation for speeding up the device turn off and for providing the same injection efficiency...
This paper presents versatile HV lateral JFET design method on 0.18μm SOI BCD technology to achieve variable Vth(threshold voltage) and Idsat, without DIBL effect over full operating Vds range and scalable breakdown voltage capability on both N-ch and P-ch JFET. The significant advantage of a HV JFET compared to depletion MOSFET is the lower area consumption in real circuit design which due to higher...
New 60V-class intelligent power switch (IPS) technology implementing a vertical trench MOSFET has been developed for automotive applications. We have realized the method to integrate a 60V-class vertical trench MOSFET with high voltage surge robustness and 5V- and 60V-class lateral planar MOSFETs on one chip. The integrated vertical trench MOSFET is designed by 0.35μm-rule in order to reduce its specific...
For high side gate driver IC, we applied to single p-type isolation technic between high side region and 700V LDMOS (lateral double-diffused MOS) drain to reduce electric potential of junction termination by the crossing drain metal of 700V LDMOS. This single p-type isolation has low doping concentration to be fully depleted for maintaining a high voltage, normally more than 700V. It is limited to...
This paper introduces mobility enhanced 5V CMOS through geometry optimization in 130nm technology for state-of-the-art RSP performance. By realizing <100> channel direction on (100) wafer with grid-type layout, mobility of both NMOS and PMOS is enhanced in addition to increased effective width. Furthermore even higher mobility is achieved through introduction of biaxial compressive stress from...
In this work, we developed a HB1340-0.13um BCD technology of the complimentary LDMOS including fully isolated structure device with dual drift layer. We could achieve LDMOS with best-in-class trade-off between specific on-resistance and breakdown voltage by its optimized drain engineering. The HB1340 process in 0.13um 1.5V/5V/6V CMOS technology platform can provide various kinds of high voltage devices...
In this paper, we present a new approach to integrate in a 0.35 μm BCD technology, low Ron LDMOS power transistors with highly competitive Specific Resistance figure of merit (Rsp, defined as Ron∗Area). The LDMOS are fully isolated in order to support applications which may bias the source/drain electrodes below the substrate potential, which is critical for devices used in high-current, high-frequency...
In this paper, a new rectifier structure in silicon carbide (SiC) is presented for the first time. The proposed structure involves neither Schottky contact nor minor carrier injection via P-N junction. With adjacent P+ areas placed sufficiently close, pinched barrier is formed for rectifier purpose. Numerical simulations are carried out to verify its function, and optimize its performance. Based on...
A two-mask process for 4H-SiC Trench MOS Barrier Schottky (TMBS) rectifiers was studied in this paper. Systematic simulations and process developments were performed and SiC TMBS devices with breakdown voltage (BV) larger than 600V were successfully fabricated. SiC TMBS devices with a mesa width of 2μm to 4μm, a trench depth 2μm and a trench oxide layer of 0.2μm oxide thickness provide good characteristics...
This paper reports on ultra-high voltage, >15 kV SiC PiN rectifiers exhibiting >95% of the avalanche rating and 115 V/μm. This is one of a few reports on > 15 kV blocking voltages measured on any single semiconductor device, and the highest percentage of the avalanche limit ever reported on devices fabricated on > 100 μm thick SiC epilayers. Excellent stability of on-state voltage drop...
Symmetric blocking power semiconductor switches require two edge terminations, one for the reverse blocking junction and the other one for the forward blocking junction. In this work, we demonstrated 1100V SiC symmetric blocking edge terminations using orthogonal positive bevel (OPB) termination and a one-zone Junction Termination Extension (JTE). The OPB was formed by orthogonally sawing 45° V-shape...
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